RTL8101L
2003-05-28
Rev.1.3
28
15-0
RXERCNT
This 16-bit counter increments by 1 for each valid packet received.
It is cleared to zero by a read command.
h'[0000],
R
5.27 CS Configuration Register
(Offset 0074h-0075h, R/W)
Bit
Name
Description/Usage
Default/Attribute
15
Testfun
1 = Auto-neg speeds up internal timer
0,WO
14-10
-
Reserved
-
9
LD
Active low TPI link disable signal. When low, TPI still transmits
link pulses and TPI stays in good link state.
1, RW
8
HEART BEAT
1 = HEART BEAT enable, 0 = HEART BEAT disable. HEART
BEAT function is only valid in 10Mbps mode.
1, RW
7
JBEN
1 = enable jabber function. 0 = disable jabber function
1, RW
6
F_LINK_100
Used to login force good link in 100Mbps for diagnostic purposes. 1
= DISABLE, 0 = ENABLE.
1, RW
5
F_Connect
Assertion of this bit forces the disconnect function to be bypassed.
0, RW
4
-
Reserved
-
3
Con_status
This bit indicates the status of the connection. 1 = valid connected
link detected; 0 = disconnected link detected.
0, RO
2
Con_status_En
Assertion of this bit configures LED1 pin to indicate connection
status.
0, RW
1
-
Reserved
-
0
PASS_SCR
Bypass Scramble
0, RW
5.28 Config5: Configuration Register 5
(Offset 00D8h, R/W)
This register, unlike other Config registers, is not protected by 93C46 Command register. I.e. there is no need to enable Config
register write prior to writing to Config5.
Bit
R/W
Symbol
Description
7
-
-
Reserved
6
R/W
BWF
Broadcast Wakeup Frame:
1: Enable Broadcast Wakeup Frame with mask bytes of only DID
field = FF FF FF FF FF FF.
0: Default value. Disable Broadcast Wakeup Frame with mask bytes
of only DID field = FF FF FF FF FF FF.
The power-on default value of this bit is 0.
5
R/W
MWF
Multicast Wakeup Frame:
1: Enable Multicast Wakeup Frame with mask bytes of only DID
field, which is a multicast address.
0: Default value. Disable Multicast Wakeup Frame with mask bytes
of only DID field, which is a multicast address.
The power-on default value of this bit is 0.
4
R/W
UWF
Unicast Wakeup Frame:
1: Enable Unicast Wakeup Frame with mask bytes of only DID field,
which is its own physical address.
0: Default value. Disable Unicast Wakeup Frame with mask bytes of
only DID field, which is its own physical address.
The power-on default value of this bit is 0.
3
R/W
FIFOAddrPtr
FIFO Address Pointer: (Realtek internal use only to test FIFO SRAM)
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