RTL8101L
2003-05-28
Rev.1.3
17
10-8
R/W
MXDMA2, 1, 0
Max DMA Burst Size per Tx DMA Burst: This field sets the maximum
size of transmit DMA data bursts according to the following table:
000 = 16 bytes
001 = 32 bytes
010 = 64 bytes
011 = 128 bytes
100 = 256 bytes
101 = 512 bytes
110 = 1024 bytes
111 = 2048 bytes
7-4
R/W
TXRR
Tx Retry Count: These are used to specify additional transmission
retries in multiple of 16(IEEE 802.3 CSMA/CD retry count). If the
TXRR is set to 0, the transmitter will re-transmit 16 times before
aborting due to excessive collisions. If the TXRR is set to a value greater
than 0, the transmitter will re-transmit a number of times equals to the
following formula before aborting:
Total retries = 16 + (TXRR * 16)
The TER bit in the ISR register or transmit descriptor will be set when
the transmission fails and reaches to this specified retry count.
3-1
-
-
Reserved
0
W
CLRABT
Clear Abort: Setting this bit to 1 causes the RTL8101L to retransmit the
packet at the last transmitted descriptor when this transmission was
aborted, Setting this bit is only permitted in the transmit abort state.
5.8 Receive Configuration Register
(Offset 0044h-0047h, R/W)
This register is used to set the receive configuration for the RTL8101L. Receive properties such as accepting error packets, runt
packets, setting the receive drain threshold etc. are controlled here.
Bit
R/W
Symbol
Description
31-28
-
-
Reserved
27-24
R/W
ERTH3, 2, 1, 0
Early Rx Threshold Bits: These bits are used to select the Rx threshold
multiplier of the whole packet that has been transferred to the system
buffer in early mode when the frame protocol is under the RTL8101L's
definition.
0000 = no early rx threshold
0001 = 1/16
0010 = 2/16
0011 = 3/16
0100 = 4/16
0101 = 5/16
0110 = 6/16
0111 = 7/16
1000 = 8/16
1001 = 9/16
1010 = 10/16
1011 = 11/16
1100 = 12/16
1101 = 13/16
1110 = 14/16
1111 = 15/16
23-18
-
-
Reserved
17
R/W
MulERINT
Multiple Early Interrupt Select: When this bit is set, any received
packet invokes early interrupt according to MULINT<MISR[11:0]>
setting in early mode. When this bit is reset, the packets of familiar
protocols (IPX, IP, NDIS, etc) invoke an early interrupt according to
RCR<ERTH[3:0]> setting in early mode. The packets of unfamiliar
protocols will invoke an early interrupt according to the setting of
MULINT<MISR[11:0]>.
16
R/W
RER8
The RTL8101L receives the error packet whose length is larger than 8
bytes after setting the RER8 bit to 1.
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