FEDL66525-02

OKI Semiconductor

ML66525 Family

10/27

Classification

Symbol

Type

Description

I

IO Power supply pin

I

Core Power supply pin

VBUS

I

USB Power supply pin (Vbus input pin)

GND

I

GND pin

Connect all the GND pins to GND.*

I

is not used.)

Power supply

AGND

I

Analog GND pin (Connect to the GND pin when A/D converter is not

used.)

XT0

I

Sub-clock oscillation input pin

Connect to a crystal of f = 32.768 kHz.

XT1n

O

Sub-clock oscillation output pin

Connect to a crystal of f = 32.768 kHz.

The clock output is opposite in phase to XT0.

OSC0

I

Main clock oscillation input pin

Connect to a crystal or ceramic oscillator.

When an external clock is used, this pin is configured to be clock input.

Oscillation

OSC1n

O

Main clock oscillation output pin

Connect to a crystal or ceramic oscillator.

The clock output is opposite in phase to OSC0.

Leave this pin unconnected when an external clock is used.

D+

I/O

D+ pin

D–

I/O

D– pin

USB I/F

PUCTL

O

External control output pin

Reset

RESn

I

Reset input pin

NMI

I

Non-maskable interrupt input pin

TEST

I

Test pin

Connect to the GND pin for normal operation.

I

Test pin

Connect to the GND pin for normal operation.

FLAMOD

I

Flash ROM programming mode input pin

When the FLAMOD pin is set to “L”, the device enters a programming

mode.

Others

EAn

I

External program memory access input pin

When the EA pin is enabled (low level), the internal program memory is

masked and the CPU executes the program code in external program

memory through all address space.

potential is not connected, the family devices are not guaranteed to have normal operations.