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NT5TU64M8EE Datasheet(PDF) 41 Page - Nanya Technology Corporation. |
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NT5TU64M8EE Datasheet(HTML) 41 Page - Nanya Technology Corporation. |
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41 / 96 page  DDR2 512Mb SDRAM NT5TU64M8EE / NT5TU32M16EG 41 Version 1.0 Nanya Technology Corp.© 09/2014 All Rights Reserved Burst Write with Auto-Precharge If A10 is high when a Write Command is issued, the Write with Auto-Precharge function is engaged. The DDR2 SDRAM automatically begins precharge operation after the completion of the write burst plus the write recovery time delay (WR), programmed in the MRS register, as long as tRAS is satisfied. The bank undergoing Auto-Precharge from the completion of the write burst may be reactivated if the following two conditions are satisfied. (1) The last data-in to bank activate delay time (tDAL = WR + tRP) has been satisfied. (2) The RAS cycle time (tRC) from the previous bank activation has been satisfied. Examples: Burst Write with Auto-Precharge (tRC Limit): WL = 2, tDAL = 6 (WR = 3, tRP = 3), BL = 4 NOP NOP NOP NOP NOP Bank A Activate NOP WRITE w/AP T0 T2 T1 T3 T4 T5 T6 T7 NOP CMD DQ BW-AP223 A10 ="high" tRP Auto-Precharge Begins DIN A0 DIN A1 DIN A2 DIN A3 WL = RL-1 = 2 WR tRCmin. DQS, DQS Completion of the Burst Write tDAL >=tRASmin. CK, CK Burst Write with Auto-Precharge (tWR + tRP Limit) : WL = 4, tDAL = 6 (tWR = 3, tRP = 3), BL = 4 NOP NOP NOP NOP NOP Bank A Activate NOP Posted CAS WRITE w/AP T 0 T 3 T 4 T 5 T 6 T 7 T12 NOP CMD DQ BW-AP423 A10 ="high" tRP Auto-Precharge Begins DIN A0 DIN A1 DIN A2 DIN A3 WL = RL-1 = 4 tWR >=tRC T 9 T 8 Completion of the Burst Write DQS, DQS tDAL >=tRAS CK, CK |
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