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NT5TU64M8EE Datasheet(PDF) 24 Page - Nanya Technology Corporation.

Part # NT5TU64M8EE
Description  DDR2 512Mb SDRAM
Download  96 Pages
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Manufacturer  NANYA [Nanya Technology Corporation.]
Direct Link  http://www.nanya.com
Logo NANYA - Nanya Technology Corporation.

NT5TU64M8EE Datasheet(HTML) 24 Page - Nanya Technology Corporation.

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DDR2 512Mb SDRAM
NT5TU64M8EE / NT5TU32M16EG
24
Version 1.0
Nanya Technology Corp.©
09/2014
All Rights Reserved
Burst Mode Operation
Burst mode operation is used to provide a constant flow of data to memory locations (write cycle), or from
memory locations (read cycle). The parameters that define how the burst mode will operate are burst sequence
and burst length. The DDR2 SDRAM supports 4 bit and 8 bit burst modes only. For 8 bit burst mode, full
interleave address ordering is supported, however, sequential address ordering is nibble based for ease of
implementation. The burst type, either sequential or interleaved, is programmable and defined by the address
bit 3 (A3) of the MRS. Seamless burst read or write operations are supported. Interruption of a burst read or
write operation is prohibited, when burst length = 4 is programmed. For burst interruption of a read or write
burst when burst length = 8 is
used, see the “Burst Interruption “section of this datasheet. A Burst Stop
command is not supported on DDR2 SDRAM devices.
Burst Length and Sequence
Burst Length
Starting Address
Sequential Addressing
(decimal)
Interleave Addressing
(decimal)
A2
A1
A0
4
-
0
0
0, 1, 2, 3
0, 1, 2, 3
-
0
1
1, 2, 3, 0
1, 0, 3, 2
-
1
0
2, 3, 0, 1
2, 3, 0, 1
-
1
1
3, 0, 1, 2
3, 2, 1, 0
8
0
0
0
0, 1, 2, 3, 4, 5, 6, 7
0, 1, 2, 3, 4, 5, 6, 7
0
0
1
1, 2, 3, 0, 5, 6, 7, 4
1, 0, 3, 2, 5, 4, 7, 6
0
1
0
2, 3, 0, 1, 6, 7, 4, 5
2, 3, 0, 1, 6, 7, 4, 5
0
1
1
3, 0, 1, 2, 7, 4, 5, 6
3, 2, 1, 0, 7, 6, 5, 4
1
0
0
4, 5, 6, 7, 0, 1, 2, 3
4, 5, 6, 7, 0, 1, 2, 3
1
0
1
5, 6, 7, 4, 1, 2, 3, 0
5, 4, 7, 6, 1, 0, 3, 2
1
1
0
6, 7, 4, 5, 2, 3, 0, 1
6, 7, 4, 5, 2, 3, 0, 1
1
1
1
7, 4, 5, 6, 3, 0, 1, 2
7, 6, 5, 4, 3, 2, 1, 0


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