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NT5TU64M8EE Datasheet(PDF) 21 Page - Nanya Technology Corporation. |
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NT5TU64M8EE Datasheet(HTML) 21 Page - Nanya Technology Corporation. |
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21 / 96 page  DDR2 512Mb SDRAM NT5TU64M8EE / NT5TU32M16EG 21 Version 1.0 Nanya Technology Corp.© 09/2014 All Rights Reserved Bank Activate Command The Bank Activate command is issued by holding CAS and WE high plus CS and RAS low at the rising edge of the clock. The bank addresses BA0 ~ BA1 are used to select the desired bank. Row addresses A0 through A13 have to be applied. The Bank Activate command must be applied before any Read or Write operation can be executed. Immediately after the bank active command, the DDR2 SDRAM can accept a read or write command (with or without Auto-Precharge) on the following clock cycle. If an R/W command is issued to a bank that has not satisfied the tRCDmin specification, then additive latency must be programmed into the device to delay the R/W command which is internally issued to the device. The additive latency value must be chosen to assure tRCDmin is satisfied. Additive latencies of 0, 1, 2, 3, 4, 5, and 6 are supported. Once a bank has been activated it must be precharged before another Bank Activate command can be applied to the same bank. The bank active and precharge times are defined as tRAS and tRP, respectively. The minimum time interval between successive Bank Activate commands to the same bank is determined (tRC). The minimum time interval between Bank Active commands, to other bank, is the Bank A to Bank B delay time (tRRD). In order to ensure that 8 bank devices do not exceed the instantaneous current supplying capability of 4 bank devices, certain restrictions on operation of the 8 bank devices must be observed. There are two rules. One for restricting the number of sequential ACT commands that can be issued and another for allowing more time for RAS precharge for a Precharge All command. The rules are list as follow: * 8 bank device sequential Bank Activation Restriction: No more than 4 banks may be activated in a rolling tFAW window. Converting to clocks is done by dividing tFAW by tCK and rounding up to next integer value. As an example of the rolling window, if (tFAW/tCK) rounds up to 10 clocks, and an activate command is issued in clock N, no more than three further activate commands may be issued in clock N+1 through N+9. *8 bank device Precharge All Allowance: tRP for a Precharge All command for an 8 Bank device will equal to tRP+tCK, where tRP is the value for a single bank pre-charge. Bank Activate Command Cycle: tRCD = 3, AL = 2, tRP = 3, tRRD = 2, tCCD = 2 Address NOP Command T0 T2 T1 T3 T4 Col. Addr. Bank A Row Addr. Bank B Col. Addr. Bank B Internal RAS-CAS delay tRCDmin. Bank A to Bank B delay tRRD. Activate Bank B Read A Posted CAS Activate Bank A Read B Posted CAS Read A Begins Row Addr. Bank A Addr. Bank A Precharge Bank A NOP Addr. Bank B Precharge Bank B Row Addr. Bank A Activate Bank A tRP Row Precharge Time (Bank A) tRC Row Cycle Time (Bank A) Tn Tn+1 Tn+2 Tn+3 ACT RAS-RAS delay tRRD. tRAS Row Active Time (Bank A) additive latency AL=2 CK, CK |
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