CDCLVP110 datasheet(5/11 Pages) TI

Part #	CDCLVP110

Description	LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER

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AC ELECTRICAL CHARACTERISTICS

HSTL INPUT

CDCLVP110

SCAS683A – JUNE 2002 – REVISED AUGUST 2002

LVPECL/HSTL DC ELECTRICAL CHARACTERISTICS (continued)

Vsupply: V

CC = 2.375 V to 3.8 V, VEE= 0 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

-40

°C,

Differential input

VID

Difference of input VIH-VIL, See Note

(1)

25

°C,

0.4

1.9

V

voltage (CLK1, CLK1)

85

°C

-40

°C,

Input crossover

VI(x)

Cross point of input 9 average (VIH, VIL)

25

°C,

0.68

0.9

V

voltage (CLK1, CLK1)

85

°C

-40

°C

VCC - 1.26

VCC - 0.9

High-level output

VOH

IOH = -21 mA

25

°C

VCC - 1.2

VCC - 0.9

V

voltage

85

°C

VCC - 1.15

VCC - 0.9

-40

°C

VCC - 1.85

VCC - 1.5

Low-level output

VOL

IOL = -5 mA

25

°C

VCC - 1.85

VCC - 1.45

V

voltage

85

°C

VCC - 1.85

VCC - 1.4

-40

°C,

Differential output

Terminated with 50

Ω to V

CC - 2 V, See

VOD

25

°C,

600

mV

voltage swing

Figure 4

85

°C

Vsupply: V

CC = 2.375 V to 3.8 V, VEE = 0 V or LVECL/LVPECL input VCC = 0 V, VEE = -2.375 V to -3.8 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input condition: VCM = 1 V,

-40

°C,

230

350

Differential propagation delay CLK0,

tpd

VPP = 0.5 V

25

°C,

ps

CLK0 to all Q0, Q0

… Q9, Q9

85

°C

-40

°C,

tsk(pp)

Part-to-part skew

See Note B and Figure 1

25

°C,

70

ps

85

°C

-40

°C,

tsk(o)

Output-to-output skew

See Note A and Figure 1

25

°C,

15

30

ps

85

°C

-40

°C,

t(JITTER)

Cycle-to-cycle RMS jitter

25

°C,

< 1

ps

85

°C

Functional up to 3.5 GHz, timing

-40

°C,

f(max)

Maximum frequency

specifications apply at 1 GHz,

25

°C,

3500

MHz

see Figure 3

85

°C

-40

°C,

tr/tf

Output rise and fall time (20%, 80%)

25

°C,

100

200

ps

85

°C

Vsupply: V

CC = 2.375 V to 3.8 V, VEE = 0 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

-40

°C,

Differential propagation delay CLK0,

Input condition: Vx = 0.68 V,

tpd

25

°C,

290

370

ps

CLK0 to all Q0, Q0

… Q9, Q9

Vdif = 0.4 V

85

°C

-40

°C,

tsk(pp)

Part-to-part skew

See Note B and Figure 1

25

°C,

70

ps

85

°C

-40

°C,

tsk(o)

Output to output skew

See Note A and Figure 1

25

°C,

10

30

ps

85

°C

-40

°C,

t(JITTER)

Cycle-to-cycle RMS jitter

25

°C,

<1

ps

85

°C

5

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