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IC41C1665 Datasheet(PDF) 9 Page - Integrated Circuit Solution Inc |
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IC41C1665 Datasheet(HTML) 9 Page - Integrated Circuit Solution Inc |
9 / 19 page ![]() IC41C1665 IC41LV1665 Integrated Circuit Solution Inc. 9 DR031-0A 10/17/2001 AC CHARACTERISTICS(1,2,3,4,5,6) (Recommended Operating Conditions unless otherwise noted.) -25 -30 -35 -40 Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Units tACH Column-Address Setup Time to CAS 15 — 15 — 15 — 15 — ns Precharge during WRITE Cycle tOEH OE Hold Time from WE during 4 — 4 — 4 — 5 — ns READ-MODIFY-WRITEcycle(18) tDS Data-In Setup Time(15, 22) 0 — 0 — 0 — 0 — ns tDH Data-In Hold Time(15,22) 5 — 5 — 5 — 5 — ns tRWC READ-MODIFY-WRITECycleTime 65 — 85 — 95 — 105 — ns tRWD RAS to WE Delay Time during 34 — 46 — 51 — 56 — ns READ-MODIFY-WRITECycle(14) tCWD CAS to WE Delay Time(14,20) 17 — 25 — 26 — 27 — ns tAWD Column-Address to WE Delay Time(14) 21 — 32 — 34 — 36 — ns tPC Fast Page Mode READ or WRITE 15 — 20 — 23 — 25 — ns CycleTime(24) tRASP Fast Page Mode RAS Pulse Width 25 10k 30 10K 35 10K 40 10K ns tCPA Access Time from CAS Precharge(15) —14 — 18 —20 — 22 ns tPRWC Fast Page Mode READ-WRITE Cycle Time(24) 37 — 42 — 49 — 52 — ns tOFF Output Buffer Turn-Off Delay from 3 15 3 15 3 15 3 15 ns CAS or RAS(13,15,19,29) tCLCH Last CAS going LOW to First CAS 4 — 9 — 10 — 11 — ns returning HIGH(23) tCSR CAS Setup Time (CBR REFRESH)(30,20) 5 — 10 — 10 — 10 — ns tCHR CAS Hold Time (CBR REFRESH)(30,21) 7 — 10 — 10 — 10 — ns tORD OE Setup Time prior to RAS during 0 — 0 — 0 — 0 — ns HIDDENREFRESHCycle tREF Refresh Period (256 Cycles) —4 — 4 — 4 — 4ms tT Transition Time (Rise or Fall)(2,3) 150 1 50 150 1 50 ns AC TEST CONDITIONS Output load: Two TTL Loads and 50 pF (Vcc = 5.0V ±10%) One TTL Load and 50 pF (Vcc = 3.3V ±10%) Input timing reference levels: VIH = 2.4V, VIL = 0.8V (Vcc = 5.0V ±10%); VIH = 2.0V, VIL = 0.8V (Vcc = 3.3V ±10%) Output timing reference levels: VOH = 2.0V, VOL = 0.8V (Vcc = 5V ±10%, 3.3V ±10%) |
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