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ALC5611-GR Datasheet(PDF) 44 Page - Realtek Semiconductor Corp. |
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ALC5611-GR Datasheet(HTML) 44 Page - Realtek Semiconductor Corp. |
44 / 73 page ![]() ALC5611 Datasheet AC’97 Audio Codec + Touch Panel Controller 36 Track ID: JATR-1076-21 Rev. 1.1 8.22.1. AC-Link PLL Clock Setting Table (Unit: MHz) Table 35. AC-Link PLL Clock Setting Table (Unit: MHz) MCLK N M FVCO K FOUT 13 66 7 98.222 2 24.555 3.6864 78 1 98.304 2 24.576 2.048 94 0 98.304 2 24.576 4.096 70 1 98.304 2 24.576 Note: PLL will only be enabled after a warm reset of the AC-Link 8.23. Reg-4Ch: GPIO Pin Configuration Default: 2E3Eh Table 36. Reg-4Ch: GPIO Pin Configuration Name Bits Read/Write Reset State Description Reserved 15:14 R 00’b Reserved pendown_conf 13 RW 1’h Pen-down Detect Status Source Configuration 0: Bypass 1: Normal Reserved 12 R 0’b Reserved over_temp_conf 11 RW 1’h Over-Temperature Status Source Configuration 0: Bypass 1: Normal mic1_short_det_conf 10 RW 1’h MICBIAS1 Short Current Status Source Configuration 0: Bypass 1: Normal mic2_short_det_conf 9 RW 1’h MICBIAS2 Short Current Status Source Configuration 0: Bypass 1: Normal Reserved 8:6 R 0’h Reserved gpio5_conf 5 RW 1’h GPIO5 Pin Configuration 0: Output 1: Input gpio4_conf 4 RW 1’h GPIO4 Pin Configuration 0: Output 1: Input gpio3_conf 3 RW 1’h GPIO3 Pin Configuration 0: Output 1: Input gpio2_conf 2 RW 1’h GPIO2 Pin Configuration 0: Output 1: Input gpio1_conf 1 RW 1’h GPIO1 Pin Configuration 0: Output 1: Input Reserved 0 R 0’h Reserved. Read as 0 |
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