PGA2320

SBOS312B − JULY 2004 − REVISED DECEMBER 2004

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9

GAIN SETTINGS

The gain for each channel is set by its corresponding 8-bit

code, either R[7:0] or L[7:0]; see Figure 2. The gain code

data is straight binary format. If we let N equal the decimal

equivalent of R[7:0] or L[7:0], then the following

relationships exist for the gain settings:

For N = 0:

Mute Condition. The input multiplexer is connected to

analog ground (AGNDR or AGNDL).

For N = 1 to 255:

Gain (dB) = 31.5 − [0.5

• (255 − N)]

This results in a gain range of +31.5dB (with N = 255) to

−95.5dB (with N = 1).

Changes in gain setting may be made with or without zero

crossing detection. The operation of the zero crossing

detector and timeout circuitry is discussed later in this data

sheet.

t

CSCR

t

SDS

t

CFCS

t

SDH

t

CSO

t

CFDO

MSB

CS

SCLK

SDI

SDO

Figure 3. Serial Interface Timing Requirements