9

LM321/LM358/ LM324

1.2MHz, Low-Power 36V Op Amps

www.3peakic.com.cn

Rev. B.01

In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be

considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity

conditions, a typical resistance between nearby traces is 10

which is greater than the LM321/358/324

OPA’s input bias current at +27°C (±1pA, typical). It is recommended to use

multi-layer PCB layout and route

the OPA’s -IN and +IN signal under the PCB surface.

The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard

ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 1 for

Inverting Gain application.

1. For Non-Inverting Gain and Unity-Gain Buffer:

2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to voltage, such as photo detectors):

Guard Ring

Figure 1

Ground Sensing and Rail to Rail Output

The LM321/358/324 has excellent output drive capability, delivering over 35mA of output drive current. The output

stage is a rail-to-rail topology that is capable of swinging to within 5mV of either rail. Since the inputs can go 100mV

beyond either rail, the op-

amp can easily perform ‘True Ground Sensing’.

The maximum output current is a function of total supply voltage. As the supply voltage to the amplifier increases, the

output current capability also increases. Attention must be paid to keep the junction temperature of the IC below 150°C

when the output is in continuous short-circuit. The output of the amplifier has reverse-biased ESD diodes connected to

each supply. The output should not be forced more than 0.5V beyond either supply, otherwise current will flow through

these diodes.

ESD

The LM321/358/324 has reverse-biased ESD protection diodes on all inputs and output. Input and out pins cannot be

biased more than 200mV beyond either supply rail.

Feedback Components and Suppression of Ringing

Care should be taken to ensure that the pole formed by the feedback resistors and the parasitic capacitance at the

inverting input does not degrade stability. For example, in a gain of +2 configuration with gain and feedback resistors of

10k, a poorly designed circuit board layout with

parasitic capacitance of 5pF (part +PC board) at the amplifier’s

inverting input will cause the amplifier to ring due to a pole formed at 1.2MHz. An additional capacitor of 5pF across the

feedback resistor as shown in Figure 2 will eliminate any ringing.

Careful layout is extremely important because low power signal conditioning applications demand high-impedance

circuits. The layout should also minimize stray capacitance at the

OPA’s inputs. However some stray capacitance may

be unavoidable and it may be necessary to add a 2pF to 10pF capacitor across the feedback resistor.

Select the

smallest capacitor value that ensures stability.