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EMB20P03V Datasheet(PDF) 1 Page - Excelliance MOS Corp. |
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EMB20P03V Datasheet(HTML) 1 Page - Excelliance MOS Corp. |
1 / 5 page ![]() 2013/9/18 p.1 EMB20P03V G S D P‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS ‐30V RDSON (MAX.) 20mΩ ID ‐18A UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNIT Gate‐Source Voltage VGS ±25 V Continuous Drain Current TC = 25 °C ID ‐18 A TC = 100 °C ‐13 Pulsed Drain Current 1 IDM ‐72 Avalanche Current IAS ‐10 Avalanche Energy L = 0.1mH, ID=‐10A, RG=25Ω EAS 5 mJ Repetitive Avalanche Energy 2 L = 0.05mH EAR 2.5 Power Dissipation TA = 25 °C PD 2.5 W TA = 100 °C 1 Operating Junction & Storage Temperature Range Tj, Tstg ‐55 to 150 °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNIT Junction‐to‐Case RJC 6 °C / W Junction‐to‐Ambient 3 RJA 50 1Pulse width limited by maximum junction temperature. 2Duty cycle 1% 350°C / W when mounted on a 1 in2 pad of 2 oz copper. |
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