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FM8PE581M Datasheet(PDF) 10 Page - Feeling Technology Corp. |
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FM8PE581M Datasheet(HTML) 10 Page - Feeling Technology Corp. |
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10 / 87 page  FM8PE581M Web site: http://www.feeling-tech.com.tw Rev1.00.006 Dec 01, 2016 Page 10 of 87, FM8PE581M FEELING TECHNOLOGY Situation 3: RETURN or RETFIE or RETIA Instruction PCL PCH STACK<12:0> PC 7 0 8 9 10 11 12 - - - U U U U U PCHBUF U = Unchanged Situation 4: Instruction with PCL as destination PCL PCH ALU result <7:0> Or Opcode <7:0> 7 0 8 9 PC 10 11 12 - - - PCHBUF U = Unchanged 2.1.3 STATUS (Status Register) Read/Write-POR - - - R-# R-# R/W-x R/W-x R/W-x Address Name B7 B6 B5 B4 B3 B2 B1 B0 0x003 STATUS - - - TO ̅̅̅̅ PD ̅̅̅̅ Z DC C Legend: - = unimplemented, read as ‘0’, x = unknown, # refer Table 2.9 for detail description, more bits default state, please refer to Table 2.8. This register contains the arithmetic status of the ALU, the RESET status. If the STATUS Register is the destination for an instruction that affects the Z, DC or C bits, then the write to these three bits is disabled. These bits are set or cleared according to the device logic. Furthermore, the TO ̅̅̅̅ and PD ̅̅̅̅ bits are not writable. Therefore, the result of an instruction with the STATUS Register as destination may be different than intended. For example, CLRR STATUS will clear the upper three bits and set the Z bit. This leaves the STATUS Register as 000u u1uu (where u = unchanged). C: Carry/borrow bit. ADDAR, ADCAR, ADDIA: = 0, No Carry occurred. = 1, Carry occurred. SUBAR, SBCAR, SUBIA: = 0, Borrow occurred. = 1, No borrow occurred. Note:A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRR, RLR) instructions, this bit is loaded with either the high or low order bit of the source register. DC: Half carry/half borrow bit ADDAR, ADCAR, ADDIA: = 0, No Carry from the 4th low order bit of the result occurred. = 1, Carry from the 4th low order bit of the result occurred. SUBAR, SBCAR, SUBIA: = 0, Borrow from the 4th low order bit of the result occurred. = 1, No Borrow from the 4th low order bit of the result occurred. |
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