BK3231S Datasheet

V1.5

© 2015 Beken Corporation

Proprietary and Confidential

Page 19 of 24

The I2C interface may operate as a master and/or slave, and may function on a

bus with multiple masters. The I2C provides control of SDA (serial data), SCL

(serial clock) generation and synchronization, arbitration logic, and START/STOP

control and generation.

It is assumed the reader is familiar with the I2C-Bus Specification -- Version 2.0

and system Management Bus Specification -- Version 1.1.

The bi-directional SCL (serial clock) and SDA (serial data) lines must be

connected to a positive power supply voltage through a pull-up resistor or similar

circuit. Every device connected to the bus must have an open-drain or open-

collector output for both the SCL and SDA lines, so that both are pulled high

(recessive state) when the bus is free.

3.7 SPI

The Enhanced Serial Peripheral Interface (SPI) provides access to a flexible, full-

duplex synchronous serial bus. SPI can operate as a master or slave device in

both 3-wire or 4-wire modes, and supports multiple masters and slaves on a

single SPI bus. The slave-select (NSS) signal can be configured as an input to

select SPI in slave mode, or to disable Master Mode operation in a multi-master

environment, avoiding contention on the SPI bus when more than one master

attempts simultaneous data transfers. NSS can also be configured as a chip-

select output in master mode, or disabled for 3-wire operation. Additional general

purpose port I/O pins can be used to select multiple slaves.

There are four pins for SPI interface. The master-out, slave-in (MOSI) signal is

an output from a master device and an input to slave devices. It is used to

serially transfer data from the master to the slave. This signal is an output when

SPI is operating as a master and an input when SPI is operating as a slave. Data

is transferred most-significant bit first. When configured as a master, MOSI is

driven by the MSB of the shift register in both 3- and 4-wire mode.

The master-in, slave-out (MISO) signal is an output from a slave device and an

input to the master device. It is used to serially transfer data from the slave to the

master. This signal is an input when SPI is operating as a master and an output

when SPI is operating as a slave. Data is transferred most-significant bit first.

The MISO pin is placed in a high-impedance state when the SPI module is

disabled and when the SPI operates in 4-wire mode as a slave that is not

selected. When acting as a slave in 3-wire mode, MISO is always driven by the

MSB of the shift register.