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BMP280 Datasheet(PDF) 28 Page - Bosch Sensortec GmbH |
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BMP280 Datasheet(HTML) 28 Page - Bosch Sensortec GmbH |
28 / 49 page ![]() Datasheet BMP280 Digital Pressure Sensor Page 28 BST-BMP280-DS001-19 | Revision 1.19 | January 2018 Bosch Sensortec © Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany. Note: Specifications within this document are subject to change without notice. Not intended for publication. 5. Digital interfaces The BMP280 supports the I²C and SPI digital interfaces; it acts as a slave for both protocols. The I²C interface supports the Standard, Fast and High Speed modes. The SPI interface supports both SPI mode ‘00’ (CPOL = CPHA = ‘0’) and mode ‘11’ (CPOL = CPHA = ‘1’) in 4-wire and 3- wire configuration. The following transactions are supported: Single byte write multiple byte write (using pairs of register addresses and register data) single byte read multiple byte read (using a single register address which is auto-incremented) 5.1 Interface selection Interface selection is done automatically based on CSB (chip select) status. If CSB is connected to VDDIO, the I²C interface is active. If CSB is pulled down, the SPI interface is activated. After CSB has been pulled down once (regardless of whether any clock cycle occurred), the I²C interface is disabled until the next power-on-reset. This is done in order to avoid inadvertently decoding SPI traffic to another slave as I²C data. Since power-on-reset is only executed when both VDD and VDDIO are established, there is no risk of incorrect protocol detection due to power-up sequence used. However, if I²C is to be used and CSB is not directly connected to VDDIO but rather through a programmable pin, it must be ensured that this pin already outputs the VDDIO level during power- on-reset of the device. If this is not the case, the device will be locked in SPI mode and not respond to I²C commands. 5.2 I²C Interface The I²C slave interface is compatible with Philips I²C Specification version 2.1. For detailed timings refer to Table 27. All modes (standard, fast, high speed) are supported. SDA and SCL are not pure open-drain. Both pads contain ESD protection diodes to VDDIO and GND. As the devices does not perform clock stretching, the SCL structure is a high-Z input without drain capability. GND VDDIO output driver (only for SDI) SDI /SCL high-z level shifter GND Figure 6: SDI/SCK ESD drawing The 7-bit device address is 111011x. The 6 MSB bits are fixed. The last bit is changeable by SDO value and can be changed during operation. Connecting SDO to GND results in slave address 1110110 (0x76); connection it to VDDIO results in slave address 1110111 (0x77), which is the same |
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