MSM5299A

¡ Semiconductor

7/11

FUNCTIONAL DESCRIPTION

Pin Functional Description

• ER, EL

When single MSM5299A is used, ER (EL) should be set at "L" level.

When a cascade connection is required, set the ER (EL) pin of the first MSM5299A at "L" level

and connect the EL (ER) pin of the first MSM5299A to the ER (EL) pin of the second MSM5299A,

then connect the EL (ER) pin of the second MSM5299A to the ER (EL) pin of the third MSM5299A.

•CP

Clock pulse input pin for the 4-bit parallel shift register. The data is shifted to 4 ¥ 20-bit shift

register at the falling edge of the clock pulse. The clock pulse is activated when the ENABLE

F/F is set and is deactivated when the ENABLE F/F is not set.

• SHL

Input pin to switch the input or output of pins ER and EL, and the shift direction of the 4-bit

parallel bidirectional shift register.

table below.

SHL

L

H

Input

Output

Output

Input

ER

EL

Shift direction

end data

start data

Pin

Input/Output

SHL

Description

Input pin to ENABLE F/F of MSM5299A.

Output pin of ENABLE F/F. EL is connected to next MSM5299A's

ER when MSM5299As are connected in series (cascade

connection).

Input pin to ENABLE F/F of MSM5299A.

Output pin of ENABLE F/F. ER is connected to next MSM5299A's

EL when MSM5299As are connected in series (cascade

connection).

L

H

Input

Output

Input

Output

ER

EL

EL

ER