M41T60 datasheet(10/23 Pages) STMICROELECTRONICS

Part #	M41T60

Description	Serial Access Real-Time Clock

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M41T60

10/23

CLOCK OPERATION

The M41T60 is driven by a quartz-controlled oscil-

lator with a nominal frequency of 32.768KHz. The

accuracy of the Real-Time Clock depends on the

frequency of the quartz crystal that is used as the

time-base for the RTC. The eight-byte Clock Reg-

ister (see Table 2., page 11) is used to both set the

clock and to read the date and time from the clock,

in a binary coded decimal format. Seconds, Min-

utes, and Hours are contained within the first three

registers.

Bits D6 and D7 of Clock Register 05h (Century/

Month Register) contain the CENTURY Bit 0

(CB0) and the CENTURY Bit 1 (CB1). See Table

3., page 13 for additional explanation. Bits D0

through D2 of Register 03h contain the Day (day

of the week). Registers 04h, 05h, and 06h contain

the Date (day of the month), Century/Month, and

Years. the eighth clock register is the Calibration

Register (this is described in the Clock Calibration

section). Bit D7 of Register 00h contains the STOP

Bit (ST). Setting this bit to a '1' will cause the oscil-

lator to stop. When reset to a '0,' the oscillator re-

starts within one second (typical).

Note: Upon initial power-up, the user should set

the ST Bit to a '1,' then immediately reset the ST

Bit to '0.' This provides an additional “kick-start” to

the oscillator circuit.

Bit D7 of Register 01h contains the Oscillator Fail

Interrupt Enable Bit (OFIE - see the description in

the Oscillator Fail Detection section).

Note: A WRITE to ANY location within the first

seven bytes of the clock register (0h-6h), including

the OFIE and ST Bit, will result in an update of the

system clock and a reset of the divider chain. This

could result in an inadvertent change of the current

time. These non-clock related bits should be writ-

ten prior to setting the clock, and remain un-

changed until such time as a new clock time is also

written.

The seven Clock Registers may be read one byte

at a time, or in a sequential block. The Calibration

Register (Address location 7h) may be accessed

independently. Provision has been made to en-

sure that a clock update does not occur while any

of the clock addresses are being read. If a clock

address is being read, an update of the clock reg-

isters will be halted. this will prevent a transition of

data during the READ.

Calibrating the Clock

The M41T60 is driven by a quartz-controlled oscil-

lator with a nominal frequency of 32,768Hz. The

accuracy of the clock is dependent upon the accu-

racy of the crystal, and the match between the ca-

pacitive load of the oscillator circuit and the

capacitive load for which the crystal was trimmed.

The M41T60 oscillator is designed for use with a

6pF crystal load capacitance. When the Calibra-

tion circuit is properly employed, accuracy im-

proves to better than ±2 ppm at 25°C.

The oscillation rate of crystals changes with tem-

perature (see Figure 13., page 12). The M41T60

design employs periodic counter correction. The

calibration circuit adds or subtracts counts from

the oscillator divider circuit at the divide by 256

stage, as shown in Figure 14., page 12. The num-

ber of times pulses are blanked (subtracted, neg-

ative

calibration)

or

split

(added,

positive

calibration) depends upon the value loaded into

the five Calibration Bits found in the Calibration

Register. Adding counts speeds the clock up, sub-

tracting counts slows the clock down. The Calibra-

tion Bits occupy the five lower-order bits (D4-D0)

in the Calibration Register 07h. These bits can be

set to represent any value between 0 and 31 in bi-

nary format. Bit D5 is a Sign Bit; '1' indicates posi-

tive calibration, '0' indicates negative calibration.

Calibration occurs within a 64-minute cycle. The

first 62 minutes in the cycle may, once per minute,

have one second either shortened by 128 or

lengthened by 256 oscillator cycles. If a binary '1'

is loaded into the register, only the first 2 minutes

in the 64-minute cycle will be modified; if a binary

6 is loaded, the first 12 will be affected, and so on.

Therefore, each calibration step has the effect of

adding 512 or subtracting 256 oscillator cycles for

every 125,829,120 actual oscillator cycles. That is,

+4.068 or –2.034 ppm of adjustment per calibra-

tion step in the calibration register. Assuming that

the oscillator is running at exactly 32,768Hz, each

of the 31 increments in the Calibration byte would

represent +10.7 or –5.35 seconds per day which

corresponds to a total range of +5.5 or –2.75 min-

utes per month.

Two methods are available for ascertaining how

much calibration a given M41T60 may require:

–

The first involves setting the clock, letting it run

for a month and comparing it to a known

accurate reference and recording deviation

over a fixed period of time. Calibration values,

including the number of seconds lost or gained

in a given period, can be found in Application

Note 934, “TIMEKEEPER® CALIBRATION.”

This allows the designer to give the end user

the ability to calibrate the clock as the

environment requires, even if the final product

is packaged in a non-user serviceable

enclosure. The designer could provide a

simple utility that accesses the Calibration

byte.

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