MSM5260

¡ Semiconductor

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FUNCTIONAL DESCRIPTION

Pin Functional Description

The data input pin for the 80-bit shift register (between 1st to 80th bit). The display data is

clocked in to this pin. (Positive logic)

•CP

Clock pulse input pin for 80-bit shift register. The data is shifted to the 80-bit shift register at

respectively.

The 80th bit output from the 80-bit shift register.

shift register.

When extending the number of characters, this pin is used to connect to the next MSM5260

in cascade.

• LOAD

The signal for latching the shift register contents is input from this pin.

When LOAD pin is set at "H" level, the shift register contents are transferred to the 80-bit 4-

level driver through the 80-bit level shifter.

transferred when LOAD pin was at "H" level, is held.

•DF

Synchronous signal input pin for alternate signal for LCD driving.