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UP3861P Datasheet(PDF) 5 Page - uPI Group Inc. |
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UP3861P Datasheet(HTML) 5 Page - uPI Group Inc. |
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5 / 17 page  uP3861P 5 uP3861P-DS-F0002, Feb. 2018 www.upi-semi.com Functional Description The uP3861P is a compact dual-channel synchronous- rectified buck controller specifically designed to operate with single 12V supply voltage and to deliver high quality output voltage. The two channels are operated with 180 degree phase shift and The two-channel output voltage has power on sequence set. It adopts external compensated voltage mode control to tightly regulate the feedback voltage to internal 1V. The switching frequency is programmable from 50KHz to 400KHz, providing an optimal level of integration to reduce size and cost of the power supply. The uP3861P integrates MOSFET drives that support 12V+12V bootstrapped voltage for high efficiency power conversion. The bootstrap diode is built-in to simplify the circuit design and minimize external part count. Other features include under-voltage protection and over- voltage protection. With aforementioned functions, this part provides customers a compact, high efficiency, well- protected and cost-effective solutions. Supply Voltage The VCC pin receives supply input to power the control circuit and a gate drive. This pin requires a minimum 1uF ceramic capacitor for locally bypassing. The bypassing capacitor should be placed physically near this pin. An internal linear regulator regulates VCC supply voltage into a 5.0V voltage for internal control logic circuit and a 1V reference voltage Power-on-Reset (POR) The uP3861P continuously monitors 1.)VCC pin voltage, 2)OCSET1/2 pin voltage for power on reset. When the voltage on VCC and OCSET 1/2 exceeds their rising POR threshold voltage respectively (9.5V and 1.6V ), the POR function initiates soft-start operation. Where the voltage at OCSET1/OCSET2 pin is equal to VIN1/VIN2 minus a fixed voltage drop (VOCSET1/VOCSET2=VIN1/VIN2- VROCSET1/VROCSET2).For operation with a single +12V power source, VIN1/VIN2 and VCC are equivalent and the +12V power source must exceed the rising VCC threshold. With all input supplies above their POR thresholds. The device initiates a soft-start interval. Soft-Start/EN The SS Pin controls the soft-start and enables/disables the controller. Connect a soft-start capacitor from SS pin to GND to set soft-start interval. When VCC reaches its power-on-reset threshold (9.5V), a soft-start current source ISS(30uA),starts to charge the capacitor. When the VSS reaches the threshold about 1 V, the internal 1.0V reference starts to rise and follows the Vss; the error amplifier output (Vcomp) suddenly rises to 1.1V, which is the valley of the triangle wave of the oscillator, leads the VOUT1/VOUT2 to start up. The up3861P VFB1 and VFB2 have power on sequence set by SEQ pin. When SEQ pulled GND and than VFB2 will start up after Vss rise up to 1.4V Figure1 shows the soft-start interval. when SEQ pulled VCC and than VFB1 will tart up after Vss rise up to 1.4V Figure2 shows the soft-start interval.. Before POR is released the SS pin is internally pulled low to ground when POR is released, an internal 30uA current source starts to charge Css, resulting in a linearly ramping- up voltage Vss . 1 I C 2 T 4 T 1 T 3 T T SS SS SS × = − = − = T0 T1 T2 VSS VFB1 1.4V Time 1V VFB2 Voltage T3 T4 Figure 1. SEQ = GND, Soft-Start Sequence T0 T1 T2 VSS VFB1 1.4V Time 1V VFB2 Voltage T3 T4 Figure 2. SEQ = Vcc, Soft-Start Sequence |
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