 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
70V657S12DRGI8 Datasheet(PDF) 19 Page - Integrated Device Technology |
|
||||||||||||||||||||||||||||||
70V657S12DRGI8 Datasheet(HTML) 19 Page - Integrated Device Technology |
|
|
19 / 24 page  19 IDT70V659/58/57S High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges Functional Description The IDT70V659/58/57 provides two ports with separate control, addressandI/Opinsthatpermitindependentaccessforreadsorwrites toanylocationinmemory.TheIDT70V659/58/57hasanautomaticpower down feature controlled by CE. The CE0 and CE1 control the on-chip powerdowncircuitrythatpermitstherespectiveporttogointoastandby mode when not selected (CE = HIGH). When a port is enabled, access to the entire memory array is permitted. Interrupts Iftheuserchoosestheinterruptfunction,amemorylocation(mail box or message center) is assigned to each port. The left port interrupt flag (INTL) is asserted when the right port writes to memory location 1FFFE (HEX) (FFFE for IDT70V658 and 7FFE for IDT70V657), where a write isdefinedasCER=R/WR=VILpertheTruthTableIII.Theleftportclears the interrupt through access of address location 1FFFE (FFFE for IDT70V658 and 7FFE for IDT70V657) when CEL = OEL = VIL, R/W is Truth Table IV — Address BUSY Arbitration NOTES: 1. Pins BUSYL and BUSYR are both outputs when the part is configured as a master. Both are inputs when configured as a slave. BUSY outputs on the IDT70V659/58/57 are push-pull, not open drain outputs. On slaves the BUSY input internally inhibits writes. 2. "L" if the inputs to the opposite port were stable prior to the address and enable inputs of this port. "H" if the inputs to the opposite port became stable after the address and enable inputs of this port. If tAPS is not met, either BUSYL or BUSYR = LOW will result. BUSYL and BUSYR outputs can not be LOW simultaneously. 3. Writes to the left port are internally ignored when BUSYL outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored when BUSYR outputs are driving LOW regardless of actual logic level on the pin. 4. A16X is a NC for IDT70V658, therefore Address comparison will be for A0 - A15. Also, A16X and A15X are NC's for IDT70V657, therefore Address comparison will be for A0 - A14. Inputs Outputs Function CEL CER AOL-A16L(4) AOR-A16R BUSYL(1) BUSYR(1) X X NO MATCH H H Normal HX MATCH H H Normal XH MATCH H H Normal LL MATCH (2) (2) Write Inhibit(3) 4869 tbl 17 Truth Table V — Example of Semaphore Procurement Sequence(1,2,3) NOTES: 1. This table denotes a sequence of events for only one of the eight semaphores on the IDT70V659/58/57. 2. There are eight semaphore flags written to via I/O0 and read from all I/O's (I/O0-I/O35). These eight semaphores are addressed by A0 - A2. 3. CE = VIH, SEM = VIL to access the semaphores. Refer to the Semaphore Read/Write Control Truth Table. Functions D0 - D35 Left D0 - D35 Right Status No Action 1 1 Semaphore free Left Port Writes "0" to Semaphore 0 1 Left port has semaphore token Right Port Writes "0" to Semaphore 0 1 No change. Right side has no write access to semaphore Left Port Writes "1" to Semaphore 1 0 Right port obtains semaphore token Left Port Writes "0" to Semaphore 1 0 No change. Left port has no write access to semaphore Right Port Writes "1" to Semaphore 0 1 Left port obtains semaphore token Left Port Writes "1" to Semaphore 1 1 Semaphore free Right Port Writes "0" to Semaphore 1 0 Right port has semaphore token Right Port Writes "1" to Semaphore 1 1 Semaphore free Left Port Writes "0" to Semaphore 0 1 Left port has semaphore token Left Port Writes "1" to Semaphore 1 1 Semaphore free 4869 tbl 18 |
Similar Part No. - 70V657S12DRGI8 |
|
Similar Description - 70V657S12DRGI8 |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
