6.42

IDT7005S/L

High-Speed 8K x 8 Dual-Port Static RAM

Military, Industrial and Commercial Temperature Ranges

15

NOTES:

1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.

2. See Interrupt Truth Table III.

3. Timing depends on which enable signal (CE or R/W) asserted last.

4. Timing depends on which enable signal (CE or R/W) is de-asserted first.

NOTES:

2738 drw 17

INTERRUPT SET ADDRESS

(2)

R/

(3)

(4)

(3)

2738 drw 18

INTERRUPT CLEAR ADDRESS

(2)

(3)

(3)

Left Port

Right Port

Function

L

L

X

1FFF

XXXX

X

XXX

X

X

X

L

L

1FFF

XXX

X

L

L

X

1FFE

X

X

LL1FFE

X

X

XXX

2738 tbl 17