IDT70V05S_18 datasheet(3/23 Pages) IDT

Part #	IDT70V05S

Description	HIGH-SPEED 3.3V 8K x 8 DUAL-PORT STATIC RAM

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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3 / 23 page

6.42

IDT70V05S/L

High-Speed 3.3V 8K x 8 Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

3

NOTES:

1. All VCC pins must be connected to power supply.

2. All GND pins must be connected to ground supply.

3. Package body is approximately 1.18 in x 1.18 in x .16 in.

4. This package code is used to reference the package diagram.

5. This text does not indicate oriention of the actual part-marking.

Pin Configura t ions(1,2,3) (c on't .)

2941 drw 04

51

50

48

46

44

42

40

38

36

53

55

57

59

61

63

65

67

68

66

1

3579

11

13

15

20

22

24

26

28

30

32

35

IDT70V05G

G68-1(4)

68-Pin PGA

Top View(5)

AB

C

D

E

F

G

H

J

K

L

47

45

43

41

34

21

23

25

27

29

31

33

2

46810

12

14

16

18

19

17

56

58

60

62

64

11

10

09

08

07

06

05

04

03

02

01

52

54

49

39

37

A5L

INTL

N/C

SEML

CEL

VDD

OEL

R/WL

I/O0L

N/C

VSS

I/O0R

VDD

N/C

OER

R/WR

SEMR

CER

VSS

BUSYR

BUSYL M/S

INTR

N/C

VSS

A1R

N/C

INDEX

A4L

A2L

A0L

A3R

A2R

A4R

A5R

A7R

A6R

A9R

A8R

A11R

A10R

A12R

A0R

A7L

A6L

A3L

A1L

A9L

A8L

A11L

A10L

A12L

VDD

I/O2R

I/O3R I/O5R

I/O6R

I/O1R

I/O4R

I/O7R

I/O1L

I/O2L I/O4L

I/O7L

I/O3L I/O5L

I/O6L

12/03/01

Pin N a m e s

t

r

o

P

t

f

e

Lt

r

o

P

t

h

g

i

Rs

e

m

a

N

E

C L

E

C R

e

l

b

a

n

E

p

i

h

C

/

R WL

/

R WR

e

l

b

a

n

E

e

ti

r

W

/

d

a

e

R

E

O L

E

O R

e

l

b

a

n

E

t

u

p

t

u

O

A0L A

-

2

1 L

A0R A

-

2

1 R

s

e

r

d

A

O

/I 0L

O

/I

-

7L

O

/I 0R

O

/I

-

7R

t

u

p

t

u

O

/t

u

p

n

I

a

t

a

D

M

E

S

L

M

E

S

R

e

l

b

a

n

E

e

r

o

h

p

a

m

e

S

T

N

I

L

T

N

I

R

g

a

l

F

t

p

u

rr

e

t

n

I

Y

S

U

B

L

Y

S

U

B

R

g

a

l

F

y

s

u

B

/

M S

t

c

e

l

e

S

e

v

a

l

S

r

o

r

e

t

s

a

M

VDD

)

v

3

.

3

(

r

e

w

o

P

VSS

)

v

0

(

d

n

u

o

r

G

0

l

b

t

1

4

9

2

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