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UB209A Datasheet(PDF) 5 Page - Unisonic Technologies |
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UB209A Datasheet(HTML) 5 Page - Unisonic Technologies |
5 / 9 page UB209A Preliminary CMOS IC UNISONICTECHNOLOGIESCO.,LTD 5 of 9 www.unisonic.com.tw QW-R502-940.e ELECTRICAL CHARACTERISTICS (TA=25°C unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Test circuit Overcharge Detection Voltage VCU VCU -0.05 VCU VCU +0.05 V 1 Overcharge Release Voltage VCL VCL-0.05 VCL VCL+0.05 V 1 Cell-balance Detection Voltage VBU VBU-0.05 VBU VBU+0.05 V 1 Cell-balance Release Voltage VBL VBL-0.05 VBL VBL+0.05 V 1 Over Discharge Detection Voltage VDL VDL-0.10 VDL VDL+0.10 V 1 Over Discharge Release Voltage VDU VDU-0.10 VDU VDU+0.10 V 1 Detection Delay Time (Note 1) tDET CCDT=0.01µF 50 100 150 ms 2 Release Delay Time tREL CCDT=0.01µF 5 10 15 ms 2 CDT Pin Detection Voltage VCDET VDS=3.5V VDS×0.65 VDS×0.70 VDS×0.75 V 3 Operating Voltage Between VDD and VSS VDSOP Output Voltage of CO, DO, CB Fixed 1.5 8.0 V CTLC Pin H Voltage VCTLCH VDS=3.5V VDS×0.55 VDS×0.90 V 4 CTLD Pin H Voltage VCTLDH VDS=3.5V VDS×0.55 VDS×0.90 V 4 CTLC Pin L Voltage VCTLCL VDS=3.5V VDS×0.10 VDS×0.45 V 4 CTLD Pin L Voltage VCTLDL VDS=3.5V VDS×0.10 VDS×0.45 V 4 Current Consumption During Operation (Note 2) IOPE VDS=3.5V 3.5 8.0 µA 5 Source Current CTLC (Note 2) ICTLCH VDS=3.5V, VCTLC=0V 200 400 600 nA 6 Source Current CTLD (Note 2) ICTLDH VDS=3.5V, VCTLD=0V 200 400 600 nA 6 Source Current CB ICBH VCB=4.0V, VDS=4.5V 30 µA 7 Sink Current CB ICBL VCB=0.5V, VDS=3.5V 30 µA 7 Sink Current CO ICOL VCO=0.5V, VDS=3.5V 30 µA 7 Leakage Current CO ICOH VCO=18V, VDS=4.5V 0.2 µA 8 Sink Current DO IDOL VDO=0.5V, VDS=3.5V 30 µA 7 Leakage Current DO IDOH VDO=18 V, VDS=1.8V 0.2 µA 8 Notes: 1. In the UTC UB209A Series, users are able to set delay time for the output pins. By using the following formula, delay time is calculated with the value of CDT pin’s resistance in the IC (RCDT) and the value of capacitor set externally at the CDT pin (CCDT). tD [s]=-ln(1-VCDET /VDS)×CCDT [µF]×RCDT [MΩ] =-ln (1-0.7(Typ.) )×CCDT [µF]×8.31MΩ (Typ.) =10.0MΩ(Typ.)×CCDT [µF] In case of the capacitance of CDT pin CCDT=0.01µF, the output pin delay time tD is calculated by using the above formula and as follows. tD [s]=10.0MΩ(Typ.)×0.01µF=0.1s(Typ.) Test the CDT pin detection voltage (VCDET) by test circuits shown in this datasheet after applying the power supply while pulling-down the CTLC, CTLD pins to the level of VSS pin outside the IC. 2. In case of using CTLC, CTLD pins pulled-down to the level of VSS pin externally, the current flows into the VDD pin (IDD) is calculated by the following formula. IDD=IOPE+ICTLCH+ICTLDH |
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