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S1D13706 Datasheet(PDF) 31 Page - Epson Company |
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S1D13706 Datasheet(HTML) 31 Page - Epson Company |
31 / 152 page Epson Research and Development Page 31 Vancouver Design Center Hardware Functional Specification S1D13706 Issue Date: 2004/02/09 X31B-A-001-09 5 D.C. Characteristics Note The S1D13706 requires that Core VDD ≤ HIO VDD and Core VDD ≤ NIO VDD. Table 5-1: Absolute Maximum Ratings Symbol Parameter Rating Units Core VDD Supply Voltage VSS - 0.3 to 4.0 V IO VDD Supply Voltage VSS - 0.3 to 4.0 V VIN Input Voltage VSS - 0.3 to IO VDD + 0.5 V VOUT Output Voltage VSS - 0.3 to IO VDD + 0.5 V TSTG Storage Temperature -65 to 150 ° C TSOL Solder Temperature/Time 260 for 10 sec. max at lead ° C Table 5-2: Recommended Operating Conditions Symbol Parameter Condition Min Typ Max Units Core VDD Supply Voltage VSS = 0 V 1.8 2.0 2.2 V 3.0 3.3 3.6 V HIO VDD Supply Voltage VSS = 0 V 1.8 2.0 2.2 V 3.0 3.3 3.6 V NIO VDD Supply Voltage VSS = 0 V 3.0 3.3 3.6 V VIN Input Voltage VSS IO VDD V TOPR Operating Temperature -40 25 85 ° C Table 5-3: Electrical Characteristics for VDD = 3.3V typical Symbol Parameter Condition Min Typ Max Units IDDS Quiescent Current Quiescent Conditions 170 µA IIZ Input Leakage Current -1 1 µA IOZ Output Leakage Current -1 1 µA VOH High Level Output Voltage VDD = min IOH = -6mA (Type 2) -12mA (Type 3) VDD - 0.4 V VOL Low Level Output Voltage VDD = min IOL = 6mA (Type 2) 12mA (Type 3) 0.4 V VIH High Level Input Voltage LVTTL Level, VDD = max 2.0 V VIL Low Level Input Voltage LVTTL Level, VDD = min 0.8 V VT+ High Level Input Voltage LVTTL Schmitt 1.1 2.4 V VT- Low Level Input Voltage LVTTL Schmitt 0.6 1.8 V VH1 Hysteresis Voltage LVTTL Schmitt 0.1 V RPD Pull Down Resistance VI = VDD 20 50 120 k Ω CI Input Pin Capacitance 10 pF CO Output Pin Capacitance 10 pF CIO Bi-Directional Pin Capacitance 10 pF |
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