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S1D13706 Datasheet(PDF) 7 Page - Epson Company |
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S1D13706 Datasheet(HTML) 7 Page - Epson Company |
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7 / 152 page  Epson Research and Development Page 7 Vancouver Design Center Hardware Functional Specification S1D13706 Issue Date: 2004/02/09 X31B-A-001-09 List of Tables Table 4-1: Pinout Assignments - Die Form (S1D13706D00A) . . . . . . . . . . . . . . . . . . . . 20 Table 4-2: Host Interface Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 4-3: LCD Interface Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 4-4: Clock Input Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 4-5: Miscellaneous Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 4-6: Power And Ground Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 4-7: Summary of Power-On/Reset Options . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 4-8: Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 4-9: LCD Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 5-1: Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5-2: Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 5-3: Electrical Characteristics for VDD = 3.3V typical . . . . . . . . . . . . . . . . . . . . . 31 Table 6-1: Clock Input Requirements for CLKI when CLKI to BCLK divide > 1 . . . . . . . . . . 32 Table 6-2: Clock Input Requirements for CLKI when CLKI to BCLK divide = 1 . . . . . . . . . . 33 Table 6-3: Clock Input Requirements for CLKI2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6-4: Internal Clock Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6-5: Generic #1 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 6-6: Generic #2 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6-7: Hitachi SH-4 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 6-8: Hitachi SH-3 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 6-9: Motorola MC68K #1 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 6-10: Motorola MC68K #2 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 6-11: Motorola REDCAP2 Interface Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 6-12: Motorola DragonBall Interface with DTACK Timing . . . . . . . . . . . . . . . . . . . 50 Table 6-13: Motorola DragonBall Interface without DTACK Timing . . . . . . . . . . . . . . . . . 52 Table 6-14: Passive/TFT Power-On Sequence Timing . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 6-15: Passive/TFT Power-Off Sequence Timing . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 6-16: Panel Timing Parameter Definition and Register Summary . . . . . . . . . . . . . . . . 57 Table 6-17: Single Monochrome 4-Bit Panel A.C. Timing . . . . . . . . . . . . . . . . . . . . . . . 61 Table 6-18: Single Monochrome 8-Bit Panel A.C. Timing . . . . . . . . . . . . . . . . . . . . . . . 63 Table 6-19: Single Color 4-Bit Panel A.C. Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Table 6-20: Single Color 8-Bit Panel A.C. Timing (Format 1) . . . . . . . . . . . . . . . . . . . . . 67 Table 6-21: Single Color 8-Bit Panel A.C. Timing (Format 2) . . . . . . . . . . . . . . . . . . . . . 69 Table 6-22: Single Color 16-Bit Panel A.C. Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Table 6-23: TFT A.C. Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Table 6-24: 160x160 Sharp ‘Direct’ HR-TFT Horizontal Timing . . . . . . . . . . . . . . . . . . . 77 Table 6-25: 160x160 Sharp ‘Direct’ HR-TFT Panel Vertical Timing . . . . . . . . . . . . . . . . . 79 |
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