SN74SSTV16857

14BIT REGISTERED BUFFER

WITH SSTL_2 INPUTS AND OUTPUTS

SCES344E – DECEMBER 2000 – REVISED NOVEMBER 2002

5

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VCC/2

VOLTAGE AND CURRENT WAVEFORMS

INPUTS ACTIVE AND INACTIVE TIMES

NOTES: A. CL includes probe and jig capacitance.

B. ICC tested with clock and data inputs held at VCC or GND, and IO = 0 mA.

C. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω,

input slew rate = 1 V/ns

±20% (unless otherwise noted).

D. The outputs are measured one at a time with one transition per measurement.

E. VTT = VREF = VDDQ/2

F. VIH = VREF + 310 mV (ac voltage levels) for differential inputs. VIH = VCC for LVCMOS input.

G. VIL = VREF – 310 mV (ac voltage levels) for differential inputs. VIL = GND for LVCMOS input.

H. tPLH and tPHL are the same as tpd.

0 V

VCC

LOAD CIRCUIT

50

Ω

CL = 30 pF

(see Note A)

Test Point

VTT

From Output

Under Test

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing

Input

VICR

VREF

Input

VIL

VIH

VREF

VI(PP)

tPHL

VOH

VOL

Output

VTT

VTT

tPLH

tPHL

VIH

VIL

VOL

VOH

LVCMOS

RESET

Input

Output

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VTT

VCC/2

VI(PP)

VICR

Timing

Input

VICR

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VCC/2

VREF

Input

VREF

tw

VOLTAGE WAVEFORMS

PULSE DURATION

VIH

VIL

LVCMOS

RESET

Input

tact

tinact

10%

90%

ICCH

ICCL

ICC

(see

Note B)

tsu

th

Figure 1. Load Circuit and Voltage Waveforms