IC41C16100A/IC41C16100AS

IC41LV16100A/IC41LV16100AS

Integrated Circuit Solution Inc.

7

DR030-0A 09/28/2001

(Recommended Operating Conditions unless otherwise noted.)

Symbol Parameter

Test Condition

Speed Min.

Max.

Unit

Input Leakage Current

Any input 0V

–5

5

µA

Other inputs not under test = 0V

Output Leakage Current

Output is disabled (Hi-Z)

–5

5

µA

0V

Output High Voltage Level

2.4

—

V

Output Low Voltage Level

—

0.4

V

Standby Current: TTL

5V

—

2

mA

3.3V

—

2

Standby Current: CMOS

5V

—

1

mA

3.3V

—

0.5

Operating Current:

RAS, LCAS, UCAS,

-50

—

160

mA

-60

—

145

Average Power Supply Current

Operating Current:

-50

—

90

mA

-60

—

80

Average Power Supply Current

Refresh Current:

-50

—

160

mA

-60

—

145

Average Power Supply Current

Refresh Current:

RAS, LCAS, UCAS Cycling

-50

—

160

mA

-60

—

145

Average Power Supply Current

Self Refresh Current

Self Refresh mode

5V

—

500

µA

3.3V

—

300

µA

Notes:

1. An initial pause of 200 µs is required after power-up followed by eight

RAS refresh cycles (RAS-Only or CBR) before proper device

operation is assured. The eight

2. Dependent on cycle rates.

3. Specified values are obtained with minimum cycle time and the output open.

4. Column-address is changed once each EDO page cycle.

5. Enables on-chip refresh and address counters.