AD9524BCPZ datasheet(34/56 Pages) AD

Part #	AD9524BCPZ

Description	Jitter Cleaner and Clock Generator

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AD9524

Data Sheet

Rev. F | Page 34 of 56

EEPROM OPERATIONS

The AD9524 contains an internal EEPROM (nonvolatile memory).

The EEPROM can be programmed by the user to create and store a

user defined register setting file when the power is off. This setting

file can be used for power-up and chip reset as a default setting. The

EEPROM size is 512 bytes. Descriptions of the EEPROM registers

that control EEPROM operation can be found in Table 59 and

Table 60.

During the data transfer process, the write and read registers are

generally not available via the serial port, except for one readback

bit: Status_EEPROM (Register 0xB00, Bit 0).

To determine the data transfer state through the serial port in

SPI mode, users can read the value of the Status_EEPROM bit

(1 = data transfer in process and 0 = data transfer complete).

In I²C mode, the user can address the AD9524 slave port with

the external I²C master (send an address byte to the AD9524). If

the AD9524 responds with a no acknowledge bit, the data transfer

was not received. If the AD9524 responds with an acknowledge bit,

the data transfer process is complete. The user can monitor the

Status_EEPROM bit or use Register 0x232, Bit 4 to program

the STATUS0 pin to monitor the status of the data transfer (see

Table 56).

To transfer all 512 bytes to the EEPROM, it takes approximately

46 ms. To transfer the contents of the EEPROM to the active

register, it takes approximately 40 ms.

RESET, a hard reset (an asynchronous hard reset is executed by

briefly pulling RESET low), restores the chip either to the setting

stored in EEPROM (the EEPROM pin = 1) or to the on-chip

setting (the EEPROM pin = 0). A hard reset also executes a SYNC

operation, which brings the outputs into phase alignment

according to the default settings. When EEPROM is inactive (the

EEPROM pin = 0), it takes ~2 µs for the outputs to begin

toggling after RESET is issued. When EEPROM is active (the

EEPROM pin = 1), it takes ~40 ms for the outputs to toggle after

RESET is brought high.

WRITING TO THE EEPROM

The EEPROM cannot be programmed directly through the serial

port interface. To program the EEPROM and store a register

setting file, follow these steps:

1.

Program the AD9524 registers to the desired circuit state.

If the user wants PLL2 to lock automatically after power-up,

the calibrate VCO bit (Bit 1, Register 0x0F3) must be set to 1.

This allows VCO calibration to start automatically after

register loading. Note that a valid input reference signal

must be present during VCO calibration.

2.

Set the IO_Update bit (Bit 0, Register 0x234) to 1.

3.

Program the EEPROM buffer registers, if necessary (see

the Programming the EEPROM Buffer Segment section).

This step is necessary only if users want to use the EEPROM

to control the default settings of some (but not all) of the

AD9524 registers, or if they want to control the register

setting update sequence during power-up or chip reset.

4.

Set the enable EEPROM write bit (Bit 0, Register 0xB02)

to 1 to enable the EEPROM.

5.

Set the REG2EEPROM bit (Bit 0, Register 0xB03) to 1. This

starts the process of writing data into the EEPROM to create

the EEPROM setting file. This enables the EEPROM

controller to transfer the current register values, as well as the

memory address and instruction bytes from the EEPROM

buffer segment, into the EEPROM. After the write process

is completed, the internal controller sets bit REG2EEPROM

back to 0.

Bit 0 of the Status_EEPROM register (Register 0xB00) is used

to indicate the data transfer status between the EEPROM and

the control registers (1 = data transfer in process, and 0 = data

transfer complete). At the beginning of the data transfer, the

Status_EEPROM bit is set to 1 by the EEPROM controller and

cleared to 0 at the end of the data transfer. The user can access

Status_EEPROM via the STATUS0 pin when the STATUS0

pin is programmed to monitor the Status_EEPROM bit.

Alternatively, the user can monitor the Status_EEPROM bit

directly.

6.

When the data transfer is complete (Status_EEPROM = 0),

set the enable EEPROM write bit (Bit 0 in Register 0xB02)

to 0. Clearing the enable EEPROM write bit to 0 disables

writing to the EEPROM.

To ensure that the data transfer has completed correctly, verify

that the EEPROM data error bit (Bit 0 in Register 0xB01) = 0.

A value of 1 in this bit indicates a data transfer error.

READING FROM THE EEPROM

The following reset-related events can start the process of

restoring the settings stored in the EEPROM to the control

registers. When the EEPROM_SEL pin is set high, do any of

the following to initiate an EEPROM read:

•

Power up the AD9524.

•

Perform a hardware chip reset by pulling the RESET pin

low and then releasing RESET.

•

Set the self clearing soft reset bit (Bit 5, Register 0x000) to 1.

When the EEPROM_SEL pin is set low, set the self clearing

Soft_EEPROM bit (Bit 1, Register 0xB02) to 1. The AD9524 then

starts to read the EEPROM and loads the values into the AD9524

registers. If the EEPROM_SEL pin is low during reset or power-up,

the EEPROM is not active, and the AD9524 default values are

loaded instead.

When using the EEPROM to automatically load the AD9524

register values and lock the PLL, the calibrate VCO bit (Bit 1,

Register 0x0F3) must be set to 1 when the register values are

written to the EEPROM. This allows VCO calibration to start

automatically after register loading. A valid input reference

signal must be present during VCO calibration.

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