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AD9523-1BCPZ Datasheet(PDF) 5 Page - Analog Devices |
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AD9523-1BCPZ Datasheet(HTML) 5 Page - Analog Devices |
5 / 63 page Data Sheet AD9523-1 Rev. C | Page 5 of 63 Parameter Min Typ Max Unit Test Conditions/Comments HSTL Mode, 16 mA VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 20 24.2 mA f = 122.88 MHz VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 50 59.1 mA f = 983.04 MHz HSTL Mode, 8 mA VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 14 16.7 mA f = 122.88 MHz VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 42.5 49 mA f = 983.04 MHz CMOS Mode (Single-Ended) VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 2 2.4 mA f = 15.36 MHz, 10 pF Load CLOCK OUTPUT DRIVERS—LOWER POWER MODE ON Channel x control register, Bit 4 = 1 LVDS Mode, 7 mA VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 10 10.8 mA f = 122.88 MHz VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 27 29.8 mA f = 983.04 MHz LVDS Mode, 3.5 mA VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 6.5 7.5 mA f = 122.88 MHz VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 23 26.3 mA f = 983.04 MHz LVPECL Mode VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 11 12.4 mA f = 122.88 MHz VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 28 31.2 mA f = 983.04 MHz HSTL Mode, 16 mA VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 20 24.3 mA f = 122.88 MHz VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 50 59.1 mA f = 983.04 MHz HSTL Mode, 8 mA VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 11 12.7 mA f = 122.88 MHz VDD3_OUT[x:y],1 Supply Voltage Clock Output Drivers 27 31.8 mA f = 983.04 MHz 1 x and y are the pair of differential outputs that share the same power supply. For example, VDD3_OUT[0:1] is Supply Voltage Clock Output OUT0, OUT0 (Pin 68 and Pin 67, respectively) and Supply Voltage Clock Output OUT1, OUT1 (Pin 65 and Pin 64, respectively). |
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