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R2S15900SP Datasheet(PDF) 7 Page - Renesas Technology Corp |
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R2S15900SP Datasheet(HTML) 7 Page - Renesas Technology Corp |
7 / 9 page R2S15900SP Rev.1.3 May 30, 2005 page 7 of 8 I 2C Bus Format MSB LSB MSB LSB MSB LSB S Slave Address A Sub Address A Data A P 1 bit 8bit 1 bit 8bit 1 bit 8bit 1 bit 1bit S: Starting Term A: Acknowledge Bit P: Stop Term If more than one Data Byte is transmitted, then the significant SUB ADDRESS bits are auto incremented. 00H → 01H → 02H → 03H → 04H → 00H 1. Slave Address MSB LSB 1 0 0 0 0 0 1 R/WB R/WB = 0: Write mode for register setting R/WB = 1: Not available 2. Sub Address Table BIT Sub Address D7 D6 D5 D4 D3 D2 D1 D0 00H Lch VOL<H> Lch VOL<L> 01H Rch VOL<H> Rch VOL<L> 02H Input selector Rec output Output gain Lch mute Rch mute 03H Bass Surround level Mode selector 04H Treble 0 0 0 Default values are all “0”. 3. Data Table <1> Master Volume Control (Sub Address: 00H, 01H) VOL<H> VOL<L> VOL ATT (dB) D7 D6 D5 D4 VOL ATT (dB) D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 –10 0 0 0 1 –1 0 0 0 1 –20 0 0 1 0 –2 0 0 1 0 –30 0 0 1 1 –3 0 0 1 1 –40 0 1 0 0 –4 0 1 0 0 –50 0 1 0 1 –5 0 1 0 1 –60 0 1 1 0 –6 0 1 1 0 –70 0 1 1 1 –7 0 1 1 1 –80 1 0 0 0 –8 1 0 0 0 –9 1 0 0 1 Example: If the volume of the Lch is set to –28dB, the Data byte is transmitted as follows: BIT Sub Address D7 D6 D5 D4 D3 D2 D1 D0 00H 0 0 1 0 1 0 0 0 |
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