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MK22FN128VMP10 Datasheet(PDF) 10 Page - NXP Semiconductors |
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MK22FN128VMP10 Datasheet(HTML) 10 Page - NXP Semiconductors |
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10 / 74 page  Table 5. Power mode transition operating behaviors Symbol Description Min. Typ. Max. Unit Notes tPOR After a POR event, amount of time from the point VDD reaches 1.71 V to execution of the first instruction across the operating temperature range of the chip. — — 300 μs 1 • VLLS0 → RUN — — 135 μs • VLLS1 → RUN — — 135 μs • VLLS2 → RUN — — 75 μs • VLLS3 → RUN — — 75 μs • LLS2 → RUN — — 6 μs • LLS3 → RUN — — 6 μs • VLPS → RUN — — 5.7 μs • STOP → RUN — — 5.7 μs 1. Normal boot (FTFA_OPT[LPBOOT]=1) 2.2.5 Power consumption operating behaviors The current parameters in the table below are derived from code executing a while(1) loop from flash, unless otherwise noted. The IDD typical values represent the statistical mean at 25°C, and the IDD maximum values for RUN, WAIT, VLPR, and VLPW represent data collected at 125°C junction temperature unless otherwise noted. The maximum values represent characterized results equivalent to the mean plus three times the standard deviation (mean + 3 sigma). Table 6. Power consumption operating behaviors Symbol Description Min. Typ. Max. Unit Notes IDDA Analog supply current — — See note mA 1 IDD_HSRUN High Speed Run mode current - all peripheral clocks disabled, CoreMark benchmark code executing from flash Table continues on the next page... General 10 Kinetis K22F 128KB Flash, Rev. 7, 08/2016 NXP Semiconductors |
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