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MK22FN128VMP10 Datasheet(PDF) 9 Page - NXP Semiconductors |
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MK22FN128VMP10 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 74 page Table 4. Voltage and current operating behaviors (continued) Symbol Description Min. Typ. Max. Unit Notes 1.71 V ≤ VDD ≤ 2.7 V, IOH = -10 mA VDD – 0.5 — — V IOHT Output high current total for all ports — — 100 mA VOL Output low voltage — Normal drive pad except RESET_B 2.7 V ≤ VDD ≤ 3.6 V, IOL = 5 mA — — 0.5 V 1 1.71 V ≤ VDD ≤ 2.7 V, IOL = 2.5 mA — — 0.5 V VOL Output low voltage — High drive pad except RESET_B 2.7 V ≤ VDD ≤ 3.6 V, IOL = 20 mA — — 0.5 V 1 1.71 V ≤ VDD ≤ 2.7 V, IOL = 10 mA — — 0.5 V VOL Output low voltage — RESET_B 2.7 V ≤ VDD ≤ 3.6 V, IOL = 3 mA — — 0.5 V 1.71 V ≤ VDD ≤ 2.7 V, IOL = 1.5 mA — — 0.5 V IOLT Output low current total for all ports — — 100 mA IIN Input leakage current (per pin) for full temperature range All pins other than high drive port pins — 0.002 0.5 μA 1, 2 High drive port pins — 0.004 0.5 μA IIN Input leakage current (total all pins) for full temperature range — — 1.0 μA 2 RPU Internal pullup resistors 20 — 50 kΩ 3 RPD Internal pulldown resistors 20 — 50 kΩ 4 1. PTB0, PTB1, PTC3, PTC4, PTD4, PTD5, PTD6, and PTD7 I/O have both high drive and normal drive capability selected by the associated PTx_PCRn[DSE] control bit. All other GPIOs are normal drive only. 2. Measured at VDD=3.6V 3. Measured at VDD supply voltage = VDD min and Vinput = VSS 4. Measured at VDD supply voltage = VDD min and Vinput = VDD 2.2.4 Power mode transition operating behaviors All specifications except tPOR, and VLLSx→RUN recovery times in the following table assume this clock configuration: • CPU and system clocks = 72 MHz • Bus clock = 36 MHz • Flash clock = 24 MHz • MCG mode: FEI General Kinetis K22F 128KB Flash, Rev. 7, 08/2016 9 NXP Semiconductors |
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