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S1D2512X01-A0B0 Datasheet(PDF) 16 Page - Samsung semiconductor |
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S1D2512X01-A0B0 Datasheet(HTML) 16 Page - Samsung semiconductor |
16 / 36 page ![]() S1D2512X01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS 15 B+ SECTION OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS (VCC = 12V, Tamb = 25 °C) Table 12. B+ Section Operating Conditions Parameter Symbol Conditions Min Typ Max Unit Minimum feedback resistor FeedRes Resistor between pins 15 and 14 5 K Ω Table 13. B+ Section Electrical Characteristics Parameter Symbol Conditions Min Typ Max Unit Error amplifier open loop gain OLG At low frequency (see 10) 85 dB Sunk current on error amplifier output when BOUT is in safety condition Icomp Pin 14 (see 12) 0.5 mA Unity gain band width UGBW (see 7) 6 MHz Regulation input bias current IRI Current sourced by pin 15 (PNP base) 0.2 µA Maximum guaranteed error amplifier output current EAOI Current sourced by pin 14 Current sunk by pin 14 0.5 2 mA mA Current sense input voltage gain CSG Pin 16 3 Max current sense input threshold voltage MCEth Pin 16 1.2 V Current sense input bias current ISI Current sourced by pin 16 (PNP base) 1 µA Maximum external power transistor on time Tonmax % of H-period @ fo = 27kHz (see 6) 100 % B+ output saturation voltage B+OSV V28 with I28 = 10mA 0.25 V Internal reference voltage IVREF On error amp positive input for subaddress 0B Byte 1000000 4.8 V Internal reference voltage adjustment range VREFADJ Byte 111111 Byte 000000 +20 -20 % % Falling time tFB+ Pin 28 100 ns |
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