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S1D2512X01-A0B0 Datasheet(PDF) 5 Page - Samsung semiconductor |
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S1D2512X01-A0B0 Datasheet(HTML) 5 Page - Samsung semiconductor |
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5 / 36 page  DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2512X01 4 PIN DESCRIPTION Table 1. Pin Description No Pin Name Description 1 H/HVIN TTL compatible horizontal sync input (separate or composite) 2 VSYNCIN TTL compatible vertical sync input (for separated H&V) 3 HLOCKOUT First PLL lock/unlock output (0V unlocked - 5V locked) 4 PLL2C Second PLL loop filter 5 C0 Horizontal oscillator capacitor 6 R0 Horizontal oscillator resistor 7 PLL1F First PLL loop filter 8 HPOSITION Horizontal position filter (capacitor to be connected to HGND) 9 HMOIRE Horizontal moire output (to be connected to PLL2 C through a resistor divider) 10 FOCUSOUT Vertical dynamic focus output 11 HGND Horizontal section ground 12 HFLY Horizontal Flyback input (positive polarity) 13 HREF Horizontal section reference voltage (to be filtered) 14 COMP B+ error amplifier output for frequency compensation and gain setting 15 REGIN Regulation input of B+ control loop 16 ISENSE Sensing of external B+ switching transistor current 17 B+GND Ground (related to B+ reference adjustment) 18 BREATH DC breathing input control (compensation of vertical amplitude against EHV variation) 19 VGND Vertical section ground 20 VAGCCAP Memory capacitor for automatic gain control loop in vertical ramp generator 21 VREF Vertical section reference voltage (to be filtered) 22 VCAP Vertical sawtooth generator capacitor 23 VOUT Vertical ramp output (with frequency independent amplitude and S or C corrections if any). It is mixed with vertical position voltage and vertical moire. 24 EWOUT Pincushion-East/West correction parabola output 25 XRAY X-RAY protection input (with internal latch function) 26 HOUT Horizontal drive output (internal transistor, open collector) 27 GND General ground (referenced to Vcc) 28 BOUT B+ PWM regulator output 29 Vcc Supply voltage (12V typ) 30 SCL I2C clock input 31 SDA I2C data input 32 5V Supply voltage (5V typ) |
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