6.42

IDT70V05S/L

High-Speed 8K x 8 Dual-Port Static RAM

Military, Industrial and Commercial Temperature Ranges

17

2941 drw 17

INTERRUPT CLEAR ADDRESS

(3)

(3)

(2)

NOTES:

1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from “A”.

2. See Interrupt Truth Table III.

3. Timing depends on which enable signal (

CE or R/W) is asserted last.

4. Timing depends on which enable signal (

CE or R/W) is de-asserted first.

2941 drw 16

INTERRUPT SET ADDRESS

R/

(3)

(4)

(3)

(2)