i

i

1

f

2 Z C

p

=

ƒ

5

6

7

8

9

10

INNR

PLIMIT

GVDD

GAIN/SLV

GND

2

1

1

2

C5

1 F

µ

2

1

51 k

R1

51 k

R2

14

TPA3126D2

SLOS942 – APRIL 2018

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Product Folder Links: TPA3126D2

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Copyright © 2018, Texas Instruments Incorporated

(1)

Resistor tolerance should be 5% or better.

8.3 Feature Description

8.3.1 Gain Setting and Master and Slave

The gain of the TPA3126D2 is set by the voltage divider connected to the GAIN/SLV control pin. Master or Slave

mode is also controlled by the same pin. An internal ADC is used to detect the 8 input states. The first four states

set the GAIN in Master mode with gains of 20, 26, 32, and 36 dB respectively, while the next four states set the

GAIN in Slave mode with gains of 20, 26, 32, and 36 dB respectively. The gain setting is latched during power-

up and cannot be changed while the device is powered on. Table 1 lists the recommended resistor values for

different state settings.

Table 1. Gain and Master/Slave

MASTER / SLAVE

MODE

GAIN

INPUT IMPEDANCE

Master

20 dB

5.6 kΩ

OPEN

60 kΩ

Master

26 dB

20 kΩ

100 kΩ

30 kΩ

Master

32 dB

39 kΩ

100 kΩ

15 kΩ

Master

36 dB

47 kΩ

75 kΩ

9 kΩ

Slave

20 dB

51 kΩ

51 kΩ

60 kΩ

Slave

26 dB

75 kΩ

47 kΩ

30 kΩ

Slave

32 dB

100 kΩ

39 kΩ

15 kΩ

Slave

36 dB

100 kΩ

16 kΩ

9 kΩ

Figure 25. Gain, Master/Slave

In Master mode, the SYNC terminal is an output, while in Slave mode, the SYNC terminal is an input for a clock.

TTL logic levels with compliance to GVDD.

8.3.2 Input Impedance

The TPA3126D2 input stage is a fully differential input stage and the input impedance changes with the gain

setting from 7.3 k

Ω at 36 dB gain to 50 kΩ at 20 dB gain. Table 1 lists the values from min to max gain. The

tolerance of the input resistor value is ±20% so that the minimum value will be higher than 5.9 k

Ω. The inputs

must be AC-coupled to minimize the output DC-offset and ensure correct ramping of the output voltages during

power-ON and power-OFF. The input AC-coupling capacitor along with the input impedance forms a high-pass

filter with the following cut-off frequency:

(1)

If a flat bass response is required down to 20 Hz the recommended cut-off frequency is a tenth of that, 2 Hz.

Table 2 lists the recommended AC-coupling capacitors for each gain setting. If a –3-dB frequency response is

accepted at 20 Hz, 10 times lower capacitors (for example, a 1-µF capacitor) can be used.