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TPA3126D2 Datasheet(PDF) 7 Page - Texas Instruments |
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TPA3126D2 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 38 page ![]() 7 TPA3126D2 www.ti.com SLOS942 – APRIL 2018 Product Folder Links: TPA3126D2 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) For the PCB layout, see the TPA3126D2EVM user guide. 7.4 Thermal Information THERMAL METRIC(1) TPA3126D2 UNIT DAD(2) 32 PINS RθJA Junction-to-ambient thermal resistance N/A °C/W RθJC(top) Junction-to-case (top) thermal resistance 1.2 °C/W ψJT Junction-to-top characterization parameter 1.2 °C/W ψJB Junction-to-board characterization parameter 21 °C/W 7.5 DC Electrical Characteristics TA = 25°C, AVCC = PVCC = 12 V to 24 V, RL = 4 Ω, fs = 400 kHz, hybrid mode (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT | VOS | Class-D output offset voltage (measured differentially) VI = 0 V 1.5 5 mV ICC Quiescent supply current SDZ = 2 V, With load and filter, PVCC = 12 V 15 mA SDZ = 2 V, With load and filter, PVCC = 24 V 23 ICC(SD) Quiescent supply current in shutdown mode SDZ = 0.8 V, With load and filter, PVCC = 12 V 20 µA SDZ = 0.8 V, With load and filter, PVCC = 24 V 30 rDS(on) Drain-source on-state resistance, measured pin to pin PVCC = 21 V, Iout = 500 mA, TJ = 25°C 90 mΩ G Gain (BTL) R1 = 5.6 kΩ, R2 = Open 19 20 21 dB R1 = 20 kΩ, R2 = 100 kΩ 25 26 27 R1 = 39 kΩ, R2 = 100 kΩ 31 32 33 dB R1 = 47 kΩ, R2 = 75 kΩ 35 36 37 G Gain (SLV) R1 = 51 kΩ, R2 = 51 kΩ 19 20 21 dB R1 = 75 kΩ, R2 = 47 kΩ 25 26 27 R1 = 100 kΩ, R2 = 39 kΩ 31 32 33 dB R1 = 100 kΩ, R2 = 16 kΩ 35 36 37 ton Turn-on time SDZ = 2 V 40 ms tOFF Turn-off time SDZ = 0.8 V 2 µs GVDD Gate drive supply IGVDD < 200 µA 5.1 5.6 6.3 V VO Output voltage maximum under PLIMIT control V(PLIMIT) = 2 V; VI = 1 Vrms 6.75 8.2 8.75 V |
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