Output Power (W)

0.001

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

1

2

5

10

0.01

0.1

1

10

50 100 200

Gain = 26dB

D002

f = 20Hz

f = 1kHz

f = 6KHz

Supply Voltage (V)

4

6

8

10

12

14

16

18

20

22

24

26

0

10

20

30

40

50

60

70

80

90

100

110

120

130

140

Gain = 26dB

D004

THD+N=1%

THD+N=10%

26

TPA3126D2

SLOS942 – APRIL 2018

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Product Folder Links: TPA3126D2

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Copyright © 2018, Texas Instruments Incorporated

9.1.1.3 Application Curves

Figure 35. Total Harmonic Distortion + Noise (PBTL) vs

Output Power

Figure 36. Maximum Output Power (PBTL) vs Supply

Voltage

10 Power Supply Recommendations

The TPA3126D2 device requires an external power supply, between 4.5 V and 26 V, for the analog circuitry

(AVCC) and the power stage (PVCC) of the amplifier. Several on-chip regulators are included on the

TPA3126D2 to generate the voltages necessary for the internal circuitry of the audio path. The voltage regulators

which have been integrated are sized only to provide the current necessary to power the internal circuitry. The

external pins are provided only as a connection point for off-chip bypass capacitors to filter the supply.

Connecting external circuitry to these regulator outputs may result in reduced performance and damage to the

device. The AVCC supply feeds internal LDO including GVDD. This LDO output are connected to external pins

for filtering purposes, but should not be connected to external circuits. GVDD LDO output have been sized to

provide current necessary for internal functions but not for external loading.

10.1 Power Supply Mode

The TPA3126D2 supports both single and dual power supply modes. For dual power supply mode application,

when AVCC is supplied with 4.5-V power, PVCC is recommended to be lower than 20 V. When PVCC is

supplied with power greater than 20 V, AVCC is recommended to be higher than 6 V.