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TPA3126D2

SLOS942 – APRIL 2018

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Copyright © 2018, Texas Instruments Incorporated

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.1.1 Typical Application

This section describes a 2.1 Master and Slave application. The Master (U1 TPA3126D2) is configured as stereo

BTL outputs with 400-kHz switching frequency and no power limit implemented, and the Slave (U2) is configured

as a mono PBTL output. Both U1 and U2 are setup with a gain of 26-dB. Inputs are connected for differential

inputs.

Figure 34. TPA3126D2 in a 2.1 Mode Application