CY7C1441KV33 datasheet(23/32 Pages) CYPRESS

Part #	CY7C1441KV33

Description	36-Mbit (1M 횞 36/2M 횞 18) Flow-Through SRAM (With ECC)

PDF	32 Pages

Scroll/Zoom	100%

Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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23 / 32 page

CY7C1441KV33

CY7C1443KV33

CY7C1441KVE33

Document Number: 001-66677 Rev. *I

Page 23 of 32

Timing Diagrams

Figure 4. Read Cycle Timing [24]

.

tCYC

t

CL

CLK

tADH

tADS

ADDRESS

t

CH

tAH

tAS

A1

t CEH

tCES

Data Out (Q)

High-Z

tCLZ

tDOH

tCDV

tOEHZ

tCDV

Single READ

BURST

READ

tOEV

tOELZ

tCHZ

Burst wraps around

to its initial state

t

ADVH

t

ADVS

t

WEH

t

WES

tADH

tADS

Q(A2)

Q(A2 + 1)

Q(A2 + 2)

Q(A1)

Q(A2)

Q(A2 + 1)

Q(A2 + 2)

Q(A2 + 3)

A2

ADV suspends burst

Deselect Cycle

DON’T CARE

UNDEFINED

ADSP

ADSC

GW, BWE,BW

X

CE

ADV

OE

Note

24. On this diagram, when CE is LOW: CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH: CE1 is HIGH or CE2 is LOW or CE3 is HIGH.

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CY7C1441KV33 Datasheet(PDF) 23 Page - Cypress Semiconductor

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