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CY7C1441KV33 Datasheet(PDF) 21 Page - Cypress Semiconductor |
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CY7C1441KV33 Datasheet(HTML) 21 Page - Cypress Semiconductor |
21 / 32 page ![]() CY7C1441KV33 CY7C1443KV33 CY7C1441KVE33 Document Number: 001-66677 Rev. *I Page 21 of 32 Capacitance Parameter [17] Description Test Conditions 100-pin TQFP Max. 165-ball FBGA Max. Unit CIN Input capacitance TA = 25C, f = 1 MHz, VDD = 3.3V, VDDQ = 2.5 V 5 5 pF CCLK Clock input capacitance 5 5 pF CIO Input/output capacitance 5 5 pF Thermal Resistance Parameter [17] Description Test Conditions 100-pin TQFP Package 165-ball FBGA Package Unit JA Thermal resistance (junction to ambient) Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA/JESD51. With Still Air (0 m/s) 35.36 14.24 °C/W With Air Flow (1 m/s) 31.30 12.47 °C/W With Air Flow (3 m/s) 28.86 11.40 °C/W JC Thermal resistance (junction to case) –7.52 3.92 °C/W JB Thermal resistance (junction to board) 28.89 7.19 °C/W AC Test Loads and Waveforms Figure 3. AC Test Loads and Waveforms OUTPUT R = 317 R = 351 5pF INCLUDING JIG AND SCOPE (a) (b) OUTPUT RL = 50 Z0 = 50 VT = 1.5V 3.3V ALL INPUT PULSES VDDQ GND 90% 10% 90% 10% 2 V/ns 1 ns (c) OUTPUT R = 1667 R = 1538 5pF INCLUDING JIG AND SCOPE (a) (b) OUTPUT RL = 50 Z0 = 50 VT = 1.25V 2.5V ALL INPUT PULSES VDDQ GND 90% 10% 90% 10% 2 V/ns 1 ns (c) 3.3V I/O Test Load 2.5V I/O Test Load Note 17. Tested initially and after any design or process change that may affect these parameters. |
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