CY7C1441KV33 datasheet(19/32 Pages) CYPRESS

Part #	CY7C1441KV33

Description	36-Mbit (1M 횞 36/2M 횞 18) Flow-Through SRAM (With ECC)

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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CY7C1441KV33

CY7C1443KV33

CY7C1441KVE33

Document Number: 001-66677 Rev. *I

Page 19 of 32

Maximum Ratings

Exceeding maximum ratings may shorten the useful life of the

device. User guidelines are not tested.

Storage Temperature ............................... –65

C to +150C

Ambient Temperature

with Power Applied .................................. –55

C to +125 C

Supply Voltage on VDD Relative to GND .....–0.3 V to +4.6 V

Supply Voltage on VDDQ Relative to GND .... –0.3 V to +VDD

DC Voltage Applied to Outputs

in Tristate ..........................................–0.5 V to VDDQ + 0.5 V

DC Input Voltage ................................ –0.5 V to VDD + 0.5 V

Current into Outputs (LOW) ........................................ 20 mA

Static Discharge Voltage

(per MIL-STD-883, Method 3015) ......................... > 2001 V

Latch-up Current ................................................... > 200 mA

DC Input Voltage ................................ –0.5 V to VDD + 0.5 V

Current into Outputs (LOW) ........................................ 20 mA

Static Discharge Voltage

(per MIL-STD-883, Method 3015) ......................... > 2001 V

Latch-up Current ................................................... > 200 mA

Operating Range

Range

Ambient

Temperature

VDD

VDDQ

Commercial

0 °C to +70 °C

3.3 V

– 5% /

+ 10%

2.5 V – 5% to

VDD

Industrial

–40 °C to +85 °C

Neutron Soft Error Immunity

Parameter

Description

Test

Conditions Typ Max*

Unit

LSBU

(Device

without

ECC)

Logical

Single-Bit

Upsets

25 °C

<5

5

FIT/

Mb

LSBU

(Device with

ECC)

00.01

FIT/

Mb

LMBU (All

Devices)

Logical

Multi-Bit

Upsets

25 °C

0

0.01

FIT/

Mb

SEL (All

Devices)

Single Event

Latch up

85 °C

0

0.1

FIT/

Dev

* No LMBU or SEL events occurred during testing; this column represents a

statistical

2, 95% confidence limit calculation. For more details refer to Application

Note AN54908 “Accelerated Neutron SER Testing and Calculation of Terrestrial

Failure Rates”.

Electrical Characteristics

Over the Operating Range

DC Characteristics

Over the Operating Range

Parameter

Description

Test Conditions

Min

Max

Units

VDD

Power supply voltage

–

3.135

3.6

V

VDDQ

I/O supply voltage

for 3.3 V I/O

3.135

VDD

V

for 2.5 V I/O

2.375

2.625

V

VOH

Output HIGH voltage

for 3.3 V I/O, IOH = -4.0 mA

2.4

–

V

for 2.5 V I/O, IOH = -1.0 mA

2.0

–

V

VOL

Output LOW voltage

for 3.3 V I/O, IOL = 8.0 mA

–

0.4

V

for 2.5 V I/O, IOL = 1.0 mA

–

0.4

V

VIH

Input HIGH voltage[15]

for 3.3 V I/O

2.0

VDD + 0.3 V

V

for 2.5 V I/O

1.7

VDD + 0.3 V

V

VIL

Input LOW voltage[15]

for 3.3 V I/O

-0.3

0.8

V

for 2.5 V I/O

-0.3

0.7

V

Notes

15. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC) > –2V (Pulse width less than tCYC/2).

16. TPower-up: Assumes a linear ramp from 0V to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.

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CY7C1441KV33 Datasheet(PDF) 19 Page - Cypress Semiconductor

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