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CY7C1441KV33 Datasheet(PDF) 11 Page - Cypress Semiconductor

Part # CY7C1441KV33
Description  36-Mbit (1M36/2M18) Flow-Through SRAM (With ECC)
PDF  32 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1441KV33 Datasheet(HTML) 11 Page - Cypress Semiconductor

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CY7C1441KV33
CY7C1443KV33
CY7C1441KVE33
Document Number: 001-66677 Rev. *I
Page 11 of 32
Partial Truth Table for Read/Write
The partial truth table for read/write for CY7C1441KV33/CY7C1441KVE33 is as follows. [6, 7, 8]
Function (CY7C1441KV33/CY7C1441KVE33)
GW
BWE
BWD
BWC
BWB
BWA
Read
H
H
XX
XX
Read
H
L
HH
HH
Write Byte A (DQA, DQPA)H
L
H
H
H
L
Write Byte B (DQB, DQPB)H
L
H
H
L
H
Write Bytes A, B (DQA, DQB, DQPA, DQPB)H
L
H
H
L
L
Write Byte C (DQC, DQPC)H
L
H
L
H
H
Write Bytes C, A (DQC, DQA, DQPC, DQPA)H
L
H
L
H
L
Write Bytes C, B (DQC, DQB, DQPC, DQPB)H
L
H
L
L
H
Write Bytes C, B, A (DQC, DQB, DQA, DQPC, DQPB,
DQPA)
HL
HL
L
L
Write Byte D (DQD, DQPD)H
L
L
H
H
H
Write Bytes D, A (DQD, DQA, DQPD, DQPA)H
L
L
H
H
L
Write Bytes D, B (DQD, DQA, DQPD, DQPA)H
L
L
H
L
H
Write Bytes D, B, A (DQD, DQB, DQA, DQPD, DQPB,
DQPA)
HL
LHL
L
Write Bytes D, B (DQD, DQB, DQPD, DQPB)
H
LLL
H
H
Write Bytes D, B, A (DQD, DQC, DQA, DQPD, DQPC,
DQPA)
H
LLL
H
L
Write Bytes D, C, A (DQD, DQB, DQA, DQPD, DQPB,
DQPA)
H
LLL
L
H
Write All Bytes
H
L
L
L
L
L
Write All Bytes
L
X
X
X
X
X
Partial Truth Table for Read/Write
The partial truth table for read/write for CY7C1443KV33 is as follows. [6, 7, 8]
Function (CY7C1443KV33)
GW
BWE
BWB
BWA
Read
H
H
X
X
Read
H
L
H
H
Write Byte A – (DQA and DQPA)H
L
H
L
Write Byte B – (DQB and DQPB)H
L
L
H
Write All Bytes
H
L
L
L
Write All Bytes
L
X
X
X
Notes
6. X = “Don't Care.” H = Logic HIGH, L = Logic LOW.
7. Table only lists a partial listing of the byte write combinations. Any Combination of BWX is valid Appropriate write is done based on which byte write is active.
8. BWx represents any byte write signal BW[A..H].To enable any byte write BWx, a Logic LOW signal should be applied at clock rise.Any number of bye writes can be
enabled at the same time for any given write.


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