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CY7C1441KV25 Datasheet(PDF) 19 Page - Cypress Semiconductor

Part # CY7C1441KV25
Description  36-Mbit (1M36) Flow-Through SRAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1441KV25 Datasheet(HTML) 19 Page - Cypress Semiconductor

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Document Number: 001-94722 Rev. *E
Page 19 of 29
CY7C1441KV25
ISB1
Automatic CE Power Down
Current – TTL Inputs
Max VDD, Device Deselected,
VIN  VIH or VIN  VIL, f = fMAX,
Inputs Switching
7.5 ns cycle,
133 MHz
–90
mA
ISB2
Automatic CE Power Down
Current – CMOS Inputs
Max VDD, Device Deselected,
VIN  VDD – 0.3 V or VIN  0.3 V,
f = 0, Inputs Static
7.5 ns cycle,
133 MHz
–80
mA
ISB3
Automatic CE Power Down
Current – CMOS Inputs
Max VDD, Device Deselected,
VIN VDDQ – 0.3 V or VIN  0.3 V,
f = fMAX, Inputs Switching
7.5 ns cycle,
133 MHz
–90
mA
ISB4
Automatic CE Power Down
Current – TTL Inputs
Max VDD, Device Deselected,
VIN  VDD – 0.3 V or VIN  0.3 V,
f = 0, Inputs Static
7.5 ns cycle,
133 MHz
–80
mA
Electrical Characteristics (continued)
Over the Operating Range
Parameter [14, 15]
Description
Test Conditions
Min
Max
Unit
Capacitance
Parameter [16]
Description
Test Conditions
165-ball FBGA
Max
Unit
CIN
Input capacitance
TA = 25 C, f = 1 MHz,
VDD = 2.5 V, VDDQ = 2.5 V
5
pF
CCLK
Clock input capacitance
5
pF
CI/O
Input/Output capacitance
5
pF
Thermal Resistance
Parameter [16]
Description
Test Conditions
165-ballFBGA
Package
Unit
JA
Thermal resistance
(junction to ambient)
Test conditions follow standard test
methods
and
procedures
for
measuring thermal impedance,
per EIA/JESD51.
With Still Air (0 m/s)
14.24
°C/W
With Air Flow (1 m/s)
12.47
°C/W
With Air Flow (3 m/s)
11.40
°C/W
JC
Thermal resistance
(junction to case)
–3.92
°C/W
JB
Thermal resistance
(junction to board)
7.19
°C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
OUTPUT
R = 1667
R = 1538
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50
Z0 = 50
VT = 1.25V
2.5V
ALL INPUT PULSES
VDDQ
GND
90%
10%
90%
10%
2 V/ns
 1 ns
(c)
2.5 V I/O Test Load
Note
16. Tested initially and after any design or process change that may affect these parameters.


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