CY7C1440KV33 datasheet(21/33 Pages) CYPRESS

Part #	CY7C1440KV33

Description	36-Mbit (1M 횞 36/2M 횞 18) Pipelined Sync SRAM (With ECC)

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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21 / 33 page

CY7C1440KV33

CY7C1442KV33

CY7C1440KVE33

Document Number: 001-66676 Rev. *G

Page 21 of 33

IDD

VDD operating supply current

VDD = Max,

IOUT = 0 mA,

f = fMAX = 1/tCYC

4-ns cycle,

250 MHz

× 18

–

220

mA

× 36

–

240

6-ns cycle,

167 MHz

× 36

–

190

mA

ISB1

Automatic CE power-down

current – TTL inputs

VDD = Max,

device deselected,

VIN  VIH or VIN  VIL,

f = fMAX = 1/tCYC

4-ns cycle,

250 MHz

× 18

–

85

mA

× 36

–

90

6-ns cycle,

167 MHz

× 36

–

90

mA

ISB2

Automatic CE power-down

current – CMOS inputs

VDD = Max,

device deselected,

VIN  0.3 V or

VIN > VDDQ – 0.3 V,

f = 0

All speeds

× 18

–

75

mA

–80

× 36

ISB3

Automatic CE power-down

current – CMOS inputs

VDD = Max,

device deselected,

VIN  0.3 V or

VIN > VDDQ – 0.3 V,

f = fMAX = 1/tCYC

4-ns cycle,

250 MHz

× 18

–

85

mA

× 36

90

6-ns cycle,

167 MHz

× 36

–

90

mA

ISB4

Automatic CE Power-down

Current – TTL Inputs

VDD = Max,

device deselected,

VIN  VIH or VIN  VIL,

f = 0

All speeds

×18

–

75

mA

× 36

–

80

Electrical Characteristics (continued)

Over the Operating Range

Parameter [17, 18]

Description

Test Conditions

Min

Max

Unit

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CY7C1440KV33 Datasheet(PDF) 21 Page - Cypress Semiconductor

CY7C1440KV33 Datasheet(HTML) 21 Page - Cypress Semiconductor

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