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CY7C1440KV25 Datasheet(PDF) 22 Page - Cypress Semiconductor |
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CY7C1440KV25 Datasheet(HTML) 22 Page - Cypress Semiconductor |
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22 / 30 page  CY7C1440KV25 Document Number: 001-94719 Rev. *D Page 22 of 30 Switching Waveforms Figure 4. Read Cycle Timing [24] tCYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE tAH tAS A1 tCEH tCES GW, BWE, BWx Data Out (Q) High-Z tCLZ tDOH tCO ADV tOEHZ tCO Single READ BURST READ tOEV tOELZ tCHZ ADV suspends burst. Burst wraps around to its initial state tADVH tADVS tWEH tWES tADH tADS Q(A2) Q(A2 + 1) Q(A2 + 2) Q(A1) Q(A2) Q(A2 + 1) Q(A2 + 3) A2 A3 Deselect cycle Burst continued with new base address DON’T CARE UNDEFINED Note 24. On this diagram, when CE is LOW: CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH: CE1 is HIGH or CE2 is LOW or CE3 is HIGH. |
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