CY7C1440KV25 datasheet(15/30 Pages) CYPRESS

Part #	CY7C1440KV25

Description	36-Mbit (1M 횞 36) Pipelined Sync SRAM

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Manufacturer	CYPRESS [Cypress Semiconductor]

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CY7C1440KV25

Document Number: 001-94719 Rev. *D

Page 15 of 30

2.5 V TAP AC Test Conditions

Input pulse levels ...............................................VSS to 2.5 V

Input rise and fall times (Slew Rate) ........................... 2 V/ns

Input timing reference levels ....................................... 1.25 V

Output reference levels .............................................. 1.25 V

Test load termination supply voltage .......................... 1.25 V

2.5 V TAP AC Output Load Equivalent

TDO

1.25V

20pF

Z = 50

Ω

O

50

Ω

TAP DC Electrical Characteristics and Operating Conditions

(0 °C < TA < +70 °C; VDD = 2.5 V ± 0.125 V unless otherwise noted)

Parameter [12]

Description

Test Conditions

Min

Max

Unit

VOH1

Output HIGH Voltage

IOH = –1.0 mA

VDDQ = 2.5 V

1.7

–

V

VOH2

Output HIGH Voltage

IOH = –100 µA

VDDQ = 2.5 V

2.1

–

V

VOL1

Output LOW Voltage

IOL = 1.0 mA

VDDQ = 2.5 V

–

0.4

V

VOL2

Output LOW Voltage

IOL = 100 µA

VDDQ = 2.5 V

–

0.2

V

VIH

Input HIGH Voltage

–

VDDQ = 2.5 V

1.7

VDD + 0.3

V

VIL

Input LOW Voltage

–

VDDQ = 2.5 V

–0.3

0.7

V

IX

Input Load Current

GND < VIN < VDDQ

–5

5

µA

Note

12. All voltages referenced to VSS (GND).

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CY7C1440KV25 Datasheet(PDF) 15 Page - Cypress Semiconductor

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