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TPS65321A-Q1 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS65321A-Q1 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 43 page  Error Amplifier Voltage Reference FB1 SS/TR COMP RT/CLK SW BOOT VIN GND EN1 Shutdown Enable Threshold Shutdown PWRGD PowerPAD SS EN2 RST LDO_OUT FB2 VIN_LDO Thermal Shutdown UVLO Shutdown Logic Logic UV OV + + Maximum Clamp Overload Recovery PWM Comparator Logic Slope Compensation Frequency Shift Minimum Clamp Pulse Skip Oscillator with PLL Voltage Supervisor 0.8 V Linear Regulator Control OVTO R Q S Boot UVLO Boot Charge Current Sense PWM Latch Copyright © 2017, Texas Instruments Incorporated Shutdown FB1 11 TPS65321A-Q1 www.ti.com SLVSE55 – NOVEMBER 2017 Product Folder Links: TPS65321A-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Buck Regulator 7.3.1.1 Fixed-Frequency PWM Control The TPS65321A-Q1 buck regulator uses an adjustable, fixed-frequency peak current-mode control. An internal voltage reference compares the output voltage through external resistors on the FB1 pin to an error amplifier which drives the COMP pin. An internal oscillator initiates the turnon of the high-side power switch. The device compares the error amplifier output to the high-side power-switch current. When the power-switch current reaches the level set by the COMP voltage, the power switch turns off. The COMP pin voltage increases and decreases as the output current increases and decreases. The device implements a current-limit by clamping the COMP pin voltage to a maximum level. 7.3.1.2 Slope Compensation Output The TPS65321A-Q1 buck regulator adds a compensating ramp to the switch-current signal. This slope compensation prevents sub-harmonic oscillations. The available peak-inductor current remains constant over the full duty-cycle range. |
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