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TPS65321A-Q1 Datasheet(PDF) 21 Page - Texas Instruments |
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TPS65321A-Q1 Datasheet(HTML) 21 Page - Texas Instruments |
21 / 43 page ![]() (LDO _ OUT) V 0.8 (V) R5 R6 0.8 (V) - = ´ 21 TPS65321A-Q1 www.ti.com SLVSE55 – NOVEMBER 2017 Product Folder Links: TPS65321A-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 7.3.2.3 Adjusting the Output Voltage A resistor divider from the output node to the FB2 pin sets the output voltage. TI recommends using 1% tolerance or better divider resistors. Referring to the schematics in Figure 16, begin with 10 kΩ as the selected value for the R6 resistor and use Equation 21 to calculate the value of the R5 resistor. (21) To improve efficiency at light loads, consider using larger-value resistors. If the values are too high, the regulator is more susceptible to noise, and voltage errors from the FB2 input current are noticeable. 7.3.3 Thermal Shutdown The device implements an internal thermal shutdown as protection if the junction temperature exceeds 170°C (typical). The thermal shutdown forces the buck regulator to stop switching and disables the LDO regulator when the junction temperature exceeds the thermal trip threshold. Once the junction temperature decreases below 160°C (typical), the device re-initiates the power-up sequence. 7.3.4 Enable and Undervoltage Lockout The TPS65321A-Q1 device enable pins (EN1 and EN2) are high-voltage-tolerant input pins with an internal pulldown circuit. A high input activates the device and turns on the regulators. The TPS65321A-Q1 device has an internal UVLO circuit to shut down the output if the input voltage falls below an internally-fixed UVLO-falling threshold level. This UVLO circuit ensures that both regulators are not latched into an unknown state during low-input-voltage conditions. The regulators power up when the input voltage exceeds the UVLO-rising threshold level. 7.4 Device Functional Modes The device has two hardware-enable pins as listed in Table 2. The EN1 pin enables and disables the buck regulator, and the EN2 pin enables and disables the LDO regulator. Table 2. Device Operation Modes BUCK REGULATOR LDO REGULATOR DESCRIPTION EN1 EN2 0 0 Both the buck regulator and the LDO regulator are disabled. 0 1 The buck regulator is disabled. The LDO regulator is enabled. 1 0 The buck regulator is enabled and the LDO regulator is disabled. 1 1 Both the buck regulator and the LDO regulator are enabled. |
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