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LM75AD Datasheet(PDF) 7 Page - NXP Semiconductors |
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LM75AD Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 18 page ![]() Philips Semiconductors Product data sheet LM75A Digital temperature sensor and thermal Watchdog ™ 2004 Oct 05 7 FUNCTIONAL DESCRIPTION General operation The LM75A uses the on-chip band-gap sensor to measure the device temperature with the resolution of 0.125 °C and stores the 11-bit 2’s complement digital data, resulted from 11-bit A-to-D conversion, into the device Temp register. This Temp register can be read at any time by a controller on the I2C-bus. Reading temperature data does not affect the conversion in progress during the read operation. The device can be set to operate in either mode: normal or shut-down. In normal operation mode, the temp-to-digital conversion is executed every 100 ms and the Temp register is updated at the end of each conversion. In shut-down mode, the device becomes idle, data conversion is disabled and the Temp register holds the latest result; however, the device I2C interface is still active and register write/ read operation can be performed. The device operation mode is controllable by programming bit B0 of the configuration register. The temperature conversion is initiated when the device is powered-up or put back into normal mode from shut-down. In addition, at the end of each conversion in normal mode, the temperature data (or Temp) in the Temp register is automatically compared with the over-temp shut-down threshold data (or Tos) stored in the Tos register, and the hysteresis data (or Thyst) stored in the Thyst register, in order to set the state of the device OS output accordingly. The device Tos and Thyst registers are write/read capable, and both operate with 9-bit 2’s complement digital data. To match with this 9-bit operation, the temp register uses only the 9 MSB bits of its 11-bit data for the comparison. The way that the OS output responds to the comparison operation depends upon the OS operation mode selected by configuration bit B1, and the user-defined fault queue defined by configuration bits B3 and B4. In OS comparator mode, the OS output behaves like a thermostat. It becomes active when the Temp exceeds the Tos, and is reset when the Temp drops below the Thyst. Reading the device registers or putting the device into shut-down does not change the state of the OS output. The OS output in this case can be used to control cooling fans or thermal switches. In OS interrupt mode, the OS output is used for thermal interruption. When the device is powered-up, the OS output is first activated only when the Temp exceeds the Tos; then it remains active indefinitely until being reset by a read of any register. Once the OS output has been activated by crossing Tos and then reset, it can be activated again only when the Temp drops below the Thyst; then again, it remains active indefinitely until being reset by a read of any register. The OS interrupt operation would be continued in this sequence: Tos trip, Reset, Thyst trip, Reset, Tos trip, Reset, Thyst trip, Reset, … Putting the device into shut-down mode also resets the OS output. In both cases, comparator mode and interrupt mode, the OS output is activated only if a number of consecutive faults, defined by the device fault queue, has been met. The fault queue is programmable and stored in the two bits, B3 and B4, of the Configuration register. Also, the OS output active state is selectable as HIGH or LOW by setting accordingly the configuration register bit B2. At power-up, the device is put into normal operation mode, the Tos is set to 80 °C, the Thyst is set to 75 °C, the OS active state is selected LOW and the fault queue is equal to 1. The temp reading data is not available until the first conversion is completed in about 100 ms. The OS response to the temperature is illustrated in Figure 5. SL01392 Temp ** * POWER-UP TIME OS RESET OS ACTIVE OS OUTPUT IN INTERRUPT MODE OS OUTPUT IN COMPARATOR MODE OS RESET OS ACTIVE Tos Thyst READING TEMPERATURE & LIMITS * = OS is reset by either reading register or putting the device in shutdown. Assumed that the fault queue is met at each Tos and Thyst crossing point. Figure 5. OS response to temperature. |
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